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<link href="/image.php?url=https://csdnimg.cn/release/download_crawler_static/css/base.min.css" rel="stylesheet"/><link href="/image.php?url=https://csdnimg.cn/release/download_crawler_static/css/fancy.min.css" rel="stylesheet"/><link href="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89549335/raw.css" rel="stylesheet"/><div id="sidebar" style="display: none"><div id="outline"></div></div><div class="pf w0 h0" data-page-no="1" id="pf1"><div class="pc pc1 w0 h0"><img alt="" class="bi x0 y0 w1 h1" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89549335/bg1.jpg"/><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">JEDEC SOLID ST<span class="_ _0"></span>A<span class="_ _0"></span>TE TECH<span class="ls1 ws1">NOLOGY ASSOCIA<span class="_ _0"></span>TION</span></div><div class="t m0 x2 h3 y2 ff1 fs1 fc0 sc0 ls2 ws2">JESD79-3A</div><div class="t m0 x2 h4 y3 ff1 fs2 fc0 sc0 ls3 ws3">September 2007</div><div class="t m0 x1 h5 y4 ff1 fs3 fc0 sc0 ls4 ws2">JEDEC</div><div class="t m0 x1 h5 y5 ff1 fs3 fc0 sc0 ls5 ws2">ST<span class="_ _1"></span>ANDARD</div><div class="t m0 x3 h3 y6 ff1 fs1 fc0 sc0 ls2 ws4">DDR3 SDRAM Specification </div><div class="t m0 x2 h2 y7 ff1 fs0 fc0 sc0 ls1 ws5">(Revision of JESD79-3)</div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div><div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89549335/bg2.jpg"><div class="t m0 x4 h2 y8 ff1 fs0 fc0 sc0 ls6 ws2">NOTICE</div><div class="t m0 x5 h6 y9 ff2 fs2 fc0 sc0 ls7 ws6">JEDEC standards and publications contain material that has been prepared, reviewed, and </div><div class="t m0 x6 h6 ya ff2 fs2 fc0 sc0 ls8 ws7">approved through the JEDEC Board of Directors le<span class="ls9 ws8">vel and subsequently re</span>viewed and approved </div><div class="t m0 x7 h6 yb ff2 fs2 fc0 sc0 ls7 ws6">by the JEDEC legal Counsel.</div><div class="t m0 x8 h6 yc ff2 fs2 fc0 sc0 ls5 ws9">JEDEC standards and publications <span class="ws2">are designed to serve the public<span class="ls8 ws7"> interest through eliminating </span></span></div><div class="t m0 x9 h6 yd ff2 fs2 fc0 sc0 ls8 ws7">misunderstandings between manufac<span class="lsa wsa">turers and purchasers, facilit</span>ating interchangeability and </div><div class="t m0 x8 h6 ye ff2 fs2 fc0 sc0 ls8 ws7">improvement of products, and assi<span class="ls7 ws6">sting the purchaser in select<span class="lsb ws3">ing and obtaining with minimum </span></span></div><div class="t m0 xa h6 yf ff2 fs2 fc0 sc0 lsc wsb">delay the proper product for use by <span class="ls7 wsc">those other than JEDEC members,<span class="ls3"> whether the standard is to </span></span></div><div class="t m0 xb h6 y10 ff2 fs2 fc0 sc0 ls5 ws9">be used either domestical<span class="ls8 ws7">ly or internationally<span class="_ _0"></span>.</span></div><div class="t m0 xc h6 y11 ff2 fs2 fc0 sc0 ls8 ws7">JEDEC standards and publications <span class="lsa wsd">are adopted without regard to <span class="ls7 ws6">whether or not their adoption </span></span></div><div class="t m0 xa h6 y12 ff2 fs2 fc0 sc0 ls7 wse">may involve patents or articles, <span class="ls2 wsf">materials, or processes. By <span class="ls8 ws10">such action JEDEC does not assume </span></span></div><div class="t m0 x6 h6 y13 ff2 fs2 fc0 sc0 ls5 ws11">any liability to any patent owner<span class="_ _2"></span>,<span class="ls8 ws7"> nor does it assume any obligation whatever to parties adopting </span></div><div class="t m0 xd h6 y14 ff2 fs2 fc0 sc0 ls8 ws7">the JEDEC standards or publications.</div><div class="t m0 xe h6 y15 ff2 fs2 fc0 sc0 lsb ws3">The information included in JEDEC standards a<span class="ls7 ws6">nd publications represents a sound approach to </span></div><div class="t m0 xf h6 y16 ff2 fs2 fc0 sc0 ls3 ws12">product specification and application, principall<span class="lsa ws13">y from the solid stat<span class="ls5 ws2">e device manufacturer </span></span></div><div class="t m0 x8 h6 y17 ff2 fs2 fc0 sc0 lsb ws3">viewpoint. W<span class="_ _2"></span>ithin the JEDEC organization, there <span class="lsd ws14">are procedures whereby <span class="ls5 ws2">a JEDEC standard or </span></span></div><div class="t m0 x10 h6 y18 ff2 fs2 fc0 sc0 ls7 ws6">publication mya be further processed and <span class="ls8 ws7">ultimately become an ANSI standard.</span></div><div class="t m0 x11 h6 y19 ff2 fs2 fc0 sc0 lsc ws15">No claims to be in conformance <span class="ls3">with this standard may be made <span class="lsa ws16">unless all requirements stated in </span></span></div><div class="t m0 x12 h6 y1a ff2 fs2 fc0 sc0 lse wsf">the standard are met.</div><div class="t m0 x13 h6 y1b ff2 fs2 fc0 sc0 ls7 ws6">Inquiries, comments, and suggestions relative to the content of this JEDEC standard or </div><div class="t m0 xf h6 y1c ff2 fs2 fc0 sc0 ls8 ws7">publication should be addressed <span class="ls7 ws6">to JEDEC at the address be<span class="lsb ws3">low<span class="_ _0"></span>, or call (703) 907-7559 or </span></span></div><div class="t m0 x14 h6 y1d ff2 fs2 fc0 sc0 ls2 ws2">www<span class="_ _2"></span>.jedec.or<span class="_ _2"></span>g.</div><div class="t m0 x15 h6 y1e ff2 fs2 fc0 sc0 ls3 ws12">Published by</div><div class="t m0 x16 h6 y1f ff2 fs2 fc0 sc0 ls3 ws12">©JEDEC Solid State T<span class="_ _0"></span>echnology Association 2007</div><div class="t m0 x17 h6 y20 ff2 fs2 fc0 sc0 ls5 ws2">2500 W<span class="_ _2"></span>ilson Boulevard</div><div class="t m0 x18 h6 y21 ff2 fs2 fc0 sc0 lsb ws3">Arlington, V<span class="_ _3"></span>A 22201-3834</div><div class="t m0 x19 h6 y22 ff2 fs2 fc0 sc0 ls7 ws6">This document may be downloaded free of<span class="lsb ws3"> charge, however JEDEC retains the </span></div><div class="t m0 x1a h6 y23 ff2 fs2 fc0 sc0 ls8 ws17">copyright on this material. <span class="ls7 ws6">By downloading this file th<span class="ls5 ws2">e individual agrees not to </span></span></div><div class="t m0 x1b h6 y24 ff2 fs2 fc0 sc0 ls8 ws7">charge for or resell the resulting material.</div><div class="t m0 x1c h4 y25 ff1 fs2 fc0 sc0 ls8 ws7">Price: Please r<span class="_ _4"></span>efer to the current </div><div class="t m0 x1d h4 y26 ff1 fs2 fc0 sc0 lsb ws3">Catalog of JEDEC Engineering S<span class="_ _2"></span>tandards and Publications online at</div><div class="t m0 x1e h4 y27 ff1 fs2 fc0 sc0 ls8 ws2">http://www<span class="_ _2"></span>.jedec.org/<span class="lsb">Catalog/catalog.cfm</span></div><div class="t m0 x12 h6 y28 ff2 fs2 fc0 sc0 lse wsf">Printed in the U.S.A.</div><div class="t m0 x1f h6 y29 ff2 fs2 fc0 sc0 lse ws18">All rights reserved</div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div><div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89549335/bg3.jpg"><div class="t m0 x20 h7 y2a ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x20 h7 y2b ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x20 h7 y2c ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x20 h7 y2d ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x20 h7 y2e ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x20 h8 y2f ff3 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x20 h8 y30 ff3 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x20 h8 y31 ff3 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x20 h7 y32 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x21 h7 y33 ff2 fs4 fc0 sc0 lsf ws2">PL<span class="_ _4"></span>EASE! </div><div class="t m0 x22 h7 y34 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y35 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x23 h7 y36 ff2 fs4 fc0 sc0 ls10 ws19">DON’T VI<span class="_ _2"></span>OLATE </div><div class="t m0 x24 h7 y37 ff2 fs4 fc0 sc0 ls11 ws2">THE </div><div class="t m0 x25 h7 y38 ff2 fs4 fc0 sc0 ls12 ws2">LAW<span class="_ _5"></span>! </div><div class="t m0 x22 h7 y39 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y3a ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y3b ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x26 h7 y3c ff2 fs4 fc0 sc0 ls13 ws1a">This document is copyrig<span class="_ _2"></span>hted by JEDEC and may not be </div><div class="t m0 x27 h7 y3d ff2 fs4 fc0 sc0 ls13 ws1a">reproduced without permission. </div><div class="t m0 x22 h7 y3e ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x28 h7 y3f ff2 fs4 fc0 sc0 ls14 ws1b">Organizations may<span class="_ _2"></span> obtain permission to <span class="ls15 ws1c">reproduce a limited number of copies </span></div><div class="t m0 x29 h7 y40 ff2 fs4 fc0 sc0 ls16 ws1d">through entering into a license agr<span class="ls17 ws1e">eement. For information, contact: </span></div><div class="t m0 x22 h7 y41 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y42 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y43 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x2a h7 y44 ff2 fs4 fc0 sc0 ls14 ws1b">JEDEC S<span class="_ _6"></span>olid State Technology<span class="_ _2"></span> Association </div><div class="t m0 x2b h7 y45 ff2 fs4 fc0 sc0 ls13 ws1a">2500 Wilson Boulevard </div><div class="t m0 x27 h7 y46 ff2 fs4 fc0 sc0 ls18 ws1f">Arlington, Virg<span class="_ _2"></span>inia 22201-3834 </div><div class="t m0 x12 h7 y47 ff2 fs4 fc0 sc0 ls19 ws20">or call (703) 907-7559 </div><div class="t m0 x22 h7 y48 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y49 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y4a ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y4b ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y4c ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y4d ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y4e ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y4f ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y50 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y51 ff2 fs4 fc0 sc0 ls5 ws2"> </div><div class="t m0 x22 h7 y52 ff2 fs4 fc0 sc0 ls5 ws2"> </div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div><div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89549335/bg4.jpg"></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div><div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89549335/bg5.jpg"><div class="t m0 x2c h9 y53 ff4 fs5 fc0 sc0 ls1a ws21">JEDEC Standard No. 79-3A</div><div class="t m0 x2d h2 y54 ff5 fs0 fc0 sc0 ls1 ws2">Contents</div><div class="t m0 x2e h9 y55 ff4 fs5 fc0 sc0 ls5 ws2">i</div><div class="t m0 xa h6 y56 ff4 fs2 fc0 sc0 ls8 ws7">1 Scope<span class="_ _7"></span>........................................................................................................................<span class="lsb ws2">..................<span class="_ _5"></span>1</span></div><div class="t m0 xa h6 y57 ff4 fs2 fc0 sc0 lsb ws12">2 DDR3 SDRAM Package Pinout<span class="ls8 ws7"> and Addressing<span class="_ _8"> </span>......................................................................<span class="_ _5"></span>3</span></div><div class="t m0 x2f ha y58 ff4 fs2 fc0 sc0 ls3 ws12">2.1 DDR3 SDRAM x4 Ballout using MO-<span class="ls5 ws2">207 (Top view: see balls through package)<span class="_ _9"> </span><span class="ff6 ls9">......<span class="_ _a"> </span>3</span></span></div><div class="t m0 x2f ha y59 ff4 fs2 fc0 sc0 lsb ws3">2.2 DDR3 SDRAM x8 Ballout using MO-207 <span class="ls7 ws6">(Top view: see balls through package) <span class="_ _a"> </span><span class="ff6 ls5 ws2">.....<span class="_ _a"> </span>4</span></span></div><div class="t m0 x2f ha y5a ff4 fs2 fc0 sc0 ls3 ws12">2.3 DDR3 SDRAM x16 Ballout using MO-<span class="ls7 ws6">207 (Top view: see balls through package)<span class="_ _5"></span><span class="ff6 ls5 ws2">.....<span class="_ _a"> </span>5</span></span></div><div class="t m0 x2f h6 y5b ff4 fs2 fc0 sc0 ls3 ws22">2.4 Stacked / dual-die DDR3 <span class="lsd ws23">SDRAM x4 Ballout using MO-<span class="lsa ws24">207 (Top view: see balls through </span></span></div><div class="t m0 x30 ha y5c ff4 fs2 fc0 sc0 ls1b ws2">package)<span class="_ _6"></span><span class="ff6 ls5">.....................<span class="_ _6"></span>..........................................<span class="_ _6"></span><span class="ls8">..................<span class="_ _6"></span><span class="ls9">.............<span class="_ _a"> </span>6</span></span></span></div><div class="t m0 x2f h6 y5d ff4 fs2 fc0 sc0 ls3 ws22">2.5 Stacked / dual-die DDR3 <span class="lsd ws23">SDRAM x8 Ballout using MO-<span class="lsa ws24">207 (Top view: see balls through </span></span></div><div class="t m0 x30 ha y5e ff4 fs2 fc0 sc0 ls1b ws2">package)<span class="_ _6"></span><span class="ff6 ls5">.....................<span class="_ _6"></span>..........................................<span class="_ _6"></span><span class="ls8">..................<span class="_ _6"></span><span class="ls9">.............<span class="_ _a"> </span>7</span></span></span></div><div class="t m0 x2f h6 y5f ff4 fs2 fc0 sc0 ls1c ws25">2.6 Stacked / dual-die DDR3 SD<span class="ls8 ws26">RAM x16 Ballout using MO-207 <span class="lsa ws27">(Top view: see balls through </span></span></div><div class="t m0 x30 ha y60 ff4 fs2 fc0 sc0 ls1b ws2">package)<span class="_ _6"></span><span class="ff6 ls5">.....................<span class="_ _6"></span>..........................................<span class="_ _6"></span><span class="ls8">..................<span class="_ _6"></span><span class="ls9">.............<span class="_ _a"> </span>8</span></span></span></div><div class="t m0 x2f h6 y61 ff4 fs2 fc0 sc0 ls8 ws7">2.7 Pinout Descri<span class="ws2">ption<span class="_ _6"></span>.........................................................................................................<span class="ls5">.....<span class="_ _5"></span>9</span></span></div><div class="t m0 x2f h6 y62 ff4 fs2 fc0 sc0 lsd ws14">2.8 DDR3 SDRAM A<span class="ls8 ws2">ddressing<span class="_ _b"></span>.............................................................................................<span class="_ _5"></span>11</span></div><div class="t m0 x30 h6 y63 ff4 fs2 fc0 sc0 ls7 ws6">2.8.1 512Mb <span class="_"> </span>...................................................................................................................<span class="ls5 ws2">..<span class="_ _6"></span>11</span></div><div class="t m0 x30 h6 y64 ff4 fs2 fc0 sc0 ls8 ws7">2.8.2 1Gb<span class="_ _8"> </span>......................................................................................................................<span class="ls5 ws2">.....<span class="_ _6"></span>11</span></div><div class="t m0 x30 h6 y65 ff4 fs2 fc0 sc0 ls8 ws7">2.8.3 2Gb <span class="_ _8"> </span>.....................................................................................................................<span class="ls5 ws2">.....<span class="_ _6"></span>11</span></div><div class="t m0 x30 h6 y66 ff4 fs2 fc0 sc0 ls8 ws7">2.8.4 4Gb <span class="_ _8"> </span>.....................................................................................................................<span class="ls5 ws2">.....<span class="_ _6"></span>11</span></div><div class="t m0 x30 h6 y67 ff4 fs2 fc0 sc0 ls8 ws7">2.8.5 8Gb <span class="_ _8"> </span>.....................................................................................................................<span class="ls5 ws2">.....<span class="_ _6"></span>12</span></div><div class="t m0 xa h6 y68 ff4 fs2 fc0 sc0 ls8 ws7">3 Functional Description<span class="_ _7"></span>.......................................................................................................<span class="lsd ws2">......<span class="_ _5"></span>13</span></div><div class="t m0 x2f h6 y69 ff4 fs2 fc0 sc0 ls7 ws6">3.1 Simplified Stat<span class="ls1d ws28">e Diagram<span class="_ _b"></span></span><span class="ws2">.................................................................................................<span class="_ _5"></span>13</span></div><div class="t m0 x2f h6 y6a ff4 fs2 fc0 sc0 lsa ws13">3.2 Basic Functio<span class="ls8 ws2">nality........................................................................................................<span class="ls5">...<span class="_ _5"></span>14</span></span></div><div class="t m0 x2f h6 y6b ff4 fs2 fc0 sc0 ls8 ws7">3.3 RESET and Initialization Procedure<span class="_ _8"> </span>................................................................................<span class="_ _6"></span>15</div><div class="t m0 x30 h6 y6c ff4 fs2 fc0 sc0 lsc ws29">3.3.1 Power-up Initializa<span class="ls8 ws7">tion Sequence<span class="_ _6"></span>.............................................................................<span class="_ _7"></span>15</span></div><div class="t m0 x30 h6 y6d ff4 fs2 fc0 sc0 lsa ws13">3.3.2 Reset Initializ<span class="ls1e ws2a">ation with Stable<span class="ls7 ws6"> Power<span class="_ _9"> </span>.....................................................................<span class="_ _6"></span>17</span></span></div><div class="t m0 x2f h6 y6e ff4 fs2 fc0 sc0 lsc ws29">3.4 Register De<span class="lsd ws2">finition<span class="_ _c"> </span><span class="ls8">........................................................................................................<span class="ls5">...<span class="_ _6"></span>18</span></span></span></div><div class="t m0 x30 h6 y6f ff4 fs2 fc0 sc0 ls7 ws6">3.4.1 Programming the Mode<span class="ls8 ws7"> Registers<span class="_ _7"></span>............................................................................<span class="_ _5"></span>18</span></div><div class="t m0 x30 h6 y70 ff4 fs2 fc0 sc0 lsd ws14">3.4.2 Mode Register<span class="ls7 ws6"> MR0<span class="_ _8"> </span>.................................................................................................<span class="_ _5"></span>18</span></div><div class="t m0 x30 h6 y71 ff4 fs2 fc0 sc0 lsd ws14">3.4.3 Mode Register<span class="ls7 ws6"> MR1<span class="_ _8"> </span>.................................................................................................<span class="_ _5"></span>22</span></div><div class="t m0 x30 h6 y72 ff4 fs2 fc0 sc0 lsd ws14">3.4.4 Mode Register<span class="ls7 ws6"> MR2<span class="_ _8"> </span>.................................................................................................<span class="_ _5"></span>25</span></div><div class="t m0 x30 h6 y73 ff4 fs2 fc0 sc0 lsd ws14">3.4.5 Mode Register<span class="ls7 ws6"> MR3<span class="_ _8"> </span>.................................................................................................<span class="_ _5"></span>27</span></div><div class="t m0 xa h6 y74 ff4 fs2 fc0 sc0 lsb ws3">4 DDR3 SDRAM Command Descript<span class="ls8 ws2b">ion and Operation<span class="_ _7"></span>...........................................................<span class="_ _5"></span>29</span></div><div class="t m0 x2f h6 y75 ff4 fs2 fc0 sc0 ls7 ws6">4.1 Command Truth <span class="ws2">Table<span class="_ _8"> </span>.....................................................................................................<span class="_ _5"></span>29</span></div><div class="t m0 x2f h6 y76 ff4 fs2 fc0 sc0 lsc ws29">4.2 CKE Truth <span class="ls8 ws2">Table<span class="_ _7"></span>............................................................................................................<span class="ls5">..<span class="_ _6"></span>31</span></span></div><div class="t m0 x2f h6 y77 ff4 fs2 fc0 sc0 lsc ws29">4.3 No OPeration (NOP<span class="ls7 ws6">) Command<span class="_ _9"> </span>......................................................................................<span class="_ _5"></span>32</span></div><div class="t m0 x2f h6 y78 ff4 fs2 fc0 sc0 ls3 ws12">4.4 Deselect Co<span class="ls8 ws2">mmand<span class="_ _9"> </span>..........................................................................................................<span class="_ _5"></span>3<span class="ls5">2</span></span></div><div class="t m0 x2f h6 y79 ff4 fs2 fc0 sc0 ls8 ws7">4.5 DLL-off <span class="ls7 ws2">Mode<span class="_ _6"></span>...............................................................................................................<span class="_ _6"></span><span class="ls5">...<span class="_ _6"></span>33</span></span></div><div class="t m0 x2f h6 y7a ff4 fs2 fc0 sc0 ls7 ws6">4.6 DLL on/off switching procedure<span class="_ _5"></span>......................................................................................<span class="_ _5"></span>34</div><div class="t m0 x30 h6 y7b ff4 fs2 fc0 sc0 lsb ws3">4.6.1 DLL “on” to DLL “o<span class="ls8 ws7">ff” Procedure<span class="_ _9"> </span>..........................................................................<span class="_ _5"></span>34</span></div><div class="t m0 x30 h6 y7c ff4 fs2 fc0 sc0 ls8 ws7">4.6.2 DLL “off” to DLL “on” Procedure<span class="_ _9"> </span>..........................................................................<span class="_ _6"></span>35</div><div class="t m0 x2f h6 y7d ff4 fs2 fc0 sc0 lsb ws3">4.7 Input clock freque<span class="ls7 ws6">ncy change<span class="_ _9"> </span>..........................................................................................<span class="_ _5"></span>36</span></div><div class="t m0 x2f h6 y7e ff4 fs2 fc0 sc0 lsb ws3">4.8 Write Leve<span class="ls8 ws2">ling<span class="_"> </span>.............................................................................................................<span class="ls5">....<span class="_ _6"></span>38</span></span></div><div class="t m0 x30 h6 y7f ff4 fs2 fc0 sc0 lsb ws3">4.8.1 DRAM setting for write <span class="lsa wsa">leveling & DRAM termination </span>function in that mode<span class="_ _6"></span>......<span class="_ _5"></span>38</div><div class="t m0 x30 h6 y80 ff4 fs2 fc0 sc0 ls8 ws7">4.8.2 Procedure Desc<span class="ws2">ription<span class="_ _c"> </span>..............................................................................................<span class="_ _5"></span>39</span></div><div class="t m0 x30 h6 y81 ff4 fs2 fc0 sc0 ls8 ws7">4.8.3 Write Leveling M<span class="ls7 ws6">ode Exit<span class="_ _6"></span>........................................................................................<span class="_ _5"></span>41</span></div><div class="t m0 x2f h6 y82 ff4 fs2 fc0 sc0 ls8 ws7">4.9 Extended Temperat<span class="ls7 ws6">ure Usage<span class="_ _d"> </span>..........................................................................................<span class="_ _5"></span>42</span></div><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a 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class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>

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