ZIP广东华冠 HGSEMI EEPROM 扩展器件库 I2C扩展器件库 & 芯片数据手册 9.36MB

JIANGJIANXUN需要积分:6(1积分=1元)

资源文件列表:

广东华冠 HGSEMI EEPROM器件库.zip 大约有28个文件
  1. 广东华冠 HGSEMI/0.readme（使用前必读）.txt 1.34KB
  2. 广东华冠 HGSEMI/HG24C02.iic 5.33KB
  3. 广东华冠 HGSEMI/HG24C02.pdf 648.67KB
  4. 广东华冠 HGSEMI/HG24C04.iic 5.33KB
  5. 广东华冠 HGSEMI/HG24C04.pdf 648.67KB
  6. 广东华冠 HGSEMI/HG24C08.iic 5.33KB
  7. 广东华冠 HGSEMI/HG24C08.pdf 648.67KB
  8. 广东华冠 HGSEMI/HG24C1024.iic 5.33KB
  9. 广东华冠 HGSEMI/HG24C1024.pdf 615.06KB
  10. 广东华冠 HGSEMI/HG24C128.iic 5.33KB
  11. 广东华冠 HGSEMI/HG24C128.pdf 721.85KB
  12. 广东华冠 HGSEMI/HG24C16.iic 5.33KB
  13. 广东华冠 HGSEMI/HG24C16.pdf 648.67KB
  14. 广东华冠 HGSEMI/HG24C256.iic 5.33KB
  15. 广东华冠 HGSEMI/HG24C256.pdf 721.85KB
  16. 广东华冠 HGSEMI/HG24C256C.iic 5.33KB
  17. 广东华冠 HGSEMI/HG24C256C.pdf 3.39MB
  18. 广东华冠 HGSEMI/HG24C32.iic 5.33KB
  19. 广东华冠 HGSEMI/HG24C32.pdf 607.03KB
  20. 广东华冠 HGSEMI/HG24C512.iic 5.33KB
  21. 广东华冠 HGSEMI/HG24C512.pdf 574.4KB
  22. 广东华冠 HGSEMI/HG24C64.iic 5.33KB
  23. 广东华冠 HGSEMI/HG24C64.pdf 607.03KB
  24. 广东华冠 HGSEMI/HG24LC128.iic 5.33KB
  25. 广东华冠 HGSEMI/HG24LC128.pdf 618.6KB
  26. 广东华冠 HGSEMI/HG24LC256.iic 5.33KB
  27. 广东华冠 HGSEMI/HG24LC256.pdf 618.6KB
  28. 广东华冠 HGSEMI/手机淘宝APP扫码.png 16.8KB

资源介绍:

广东华冠 HGSEMI EEPROM 扩展器件库 I2C扩展器件库 ------HG24C02.iic ------HG24C02.pdf ------HG24C04.iic ------HG24C04.pdf ------HG24C04.iic ------HG24C04.pdf ------HG24C08.iic ------HG24C08.pdf ------HG24C16.iic ------HG24C16.pdf ------HG24C32.iic ------HG24C32.pdf ------HG24C64.iic ------HG24C64.pdf ------HG24C128.iic ------HG24C128.pdf ------HG24C256.iic ------HG24C256.pdf ------HG24C512.iic ------HG24C512.pdf ------HG24C1024.iic ------HG24C1024.pdf ------HG24C256C.iic ------HG24C256C.pdf .............
<link href="/image.php?url=https://csdnimg.cn/release/download_crawler_static/css/base.min.css" rel="stylesheet"/><link href="/image.php?url=https://csdnimg.cn/release/download_crawler_static/css/fancy.min.css" rel="stylesheet"/><link href="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89695648/raw.css" rel="stylesheet"/><div id="sidebar" style="display: none"><div id="outline"></div></div><div class="pf w0 h0" data-page-no="1" id="pf1"><div class="pc pc1 w0 h0"><img alt="" class="bi x0 y0 w1 h1" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89695648/bg1.jpg"/><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">HG24C256C</div><div class="t m0 x2 h3 y2 ff1 fs1 fc0 sc0 ls0 ws0">http://www.hgsemi.com.cn<span class="_ _0"> </span>2016<span class="_ _1"> </span>DEC</div><div class="c x3 y3 w2 h4"><div class="t m0 x4 h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">1</div><div class="t m0 x5 h5 y5 ff1 fs2 fc0 sc0 ls0 ws0">/</div><div class="t m0 x6 h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">26</div></div><div class="t m0 x7 h6 y6 ff2 fs3 fc0 sc0 ls0 ws0">256-Kbit<span class="_ _2"> </span>I</div><div class="t m0 x8 h7 y7 ff2 fs2 fc0 sc0 ls0 ws0">2</div><div class="t m0 x9 h6 y6 ff2 fs3 fc0 sc0 ls0 ws0">C-compatible<span class="_ _2"> </span>Serial<span class="_ _2"> </span>EEPROM</div><div class="t m0 xa h8 y8 ff2 fs4 fc0 sc0 ls0 ws0">Features</div><div class="t m0 xa h9 y9 ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">Supply<span class="_ _4"> </span>V<span class="_ _5"></span>oltage:<span class="_ _4"> </span>1.7V<span class="_ _6"> </span>to<span class="_ _4"> </span>5.5V</span></div><div class="t m0 xa h9 ya ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">2-wire<span class="_ _4"> </span>S<span class="_ _7"></span>erial<span class="_ _6"> </span>Interface<span class="_ _4"> </span>I</span></div><div class="t m0 xb ha yb ff1 fs5 fc0 sc0 ls0 ws0">2</div><div class="t m0 xc h5 ya ff1 fs2 fc0 sc0 ls0 ws0">C<span class="_ _6"> </span>Compatible</div><div class="t m0 xd h5 yc ff4 fs2 fc0 sc0 ls0 ws0">-<span class="_ _8"> </span><span class="ff1">400<span class="_ _4"> </span>kHz<span class="_ _6"> </span>and<span class="_ _4"> </span>Hi<span class="_ _7"></span>gh<span class="_ _6"> </span>Speed<span class="_ _6"> </span>1MHz<span class="_ _4"> </span>T<span class="_ _5"></span>ransfer<span class="_ _4"> </span>Rate<span class="_ _4"> </span>Co<span class="_ _7"></span>mpatibility</span></div><div class="t m0 xa h9 yd ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">Byte<span class="_ _6"> </span>and<span class="_ _6"> </span>Page<span class="_ _6"> </span>(up<span class="_ _6"> </span>to<span class="_ _6"> </span>64<span class="_ _6"> </span>Bytes)<span class="_ _4"> </span>Write<span class="_ _6"> </span>Mode</span></div><div class="t m0 xd h5 ye ff4 fs2 fc0 sc0 ls0 ws0">-<span class="_ _8"> </span><span class="ff1">Partial<span class="_ _6"> </span>Page<span class="_ _4"> </span>Writes<span class="_ _9"> </span>Allowed</span></div><div class="t m0 xa h9 yf ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">Self-timed<span class="_ _4"> </span>Write<span class="_ _4"> </span>Cycle<span class="_ _4"> </span>(3<span class="_ _7"></span>ms<span class="_ _6"> </span>Maximum)</span></div><div class="t m0 xa h9 y10 ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">Hardw<span class="_ _5"></span>are<span class="_ _4"> </span>Write<span class="_ _4"> </span>Prot<span class="_ _7"></span>ection<span class="_ _6"> </span>on<span class="_ _6"> </span>the<span class="_ _4"> </span>W<span class="_ _7"></span>hole<span class="_ _6"> </span>Memory<span class="_ _9"> </span>Array</span></div><div class="t m0 xa h9 y11 ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">Additional<span class="_ _4"> </span>6<span class="_ _7"></span>4-byte<span class="_ _4"> </span>Write<span class="_ _4"> </span>Lockable<span class="_ _6"> </span>Page<span class="_ _4"> </span>and<span class="_ _6"> </span>128<span class="_ _7"></span>-bit<span class="_ _6"> </span>Unique<span class="_ _4"> </span>ID</span></div><div class="t m0 xa h9 y12 ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">Schmitt<span class="_ _a"> </span>Tri<span class="_ _5"></span>gger<span class="_ _5"></span>,<span class="_ _4"> </span>Filtered<span class="_ _6"> </span>Inputs<span class="_ _4"> </span>for<span class="_ _4"> </span>Noise<span class="_ _6"> </span>Suppression</span></div><div class="t m0 xa h9 y13 ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">Low<span class="_ _4"> </span>Opera<span class="_ _7"></span>ting<span class="_ _6"> </span>Current</span></div><div class="t m0 xd h5 y14 ff4 fs2 fc0 sc0 ls0 ws0">-<span class="_ _8"> </span><span class="ff1">Write<span class="_ _4"> </span>Current:<span class="_ _6"> </span>1mA<span class="_ _a"> </span>(M<span class="_ _5"></span>aximum)</span></div><div class="t m0 xd h5 y15 ff4 fs2 fc0 sc0 ls0 ws0">-<span class="_ _8"> </span><span class="ff1">Read<span class="_ _4"> </span>Cu<span class="_ _7"></span>rrent:<span class="_ _4"> </span>0.5<span class="_ _7"></span>mA<span class="_ _9"> </span>(Maximum)</span></div><div class="t m0 xd hb y16 ff4 fs2 fc0 sc0 ls0 ws0">-</div><div class="t m1 xe h5 y16 ff1 fs2 fc0 sc0 ls0 ws0">Standby<span class="_ _b"> </span>Current<span class="_ _7"></span>:<span class="_ _b"> </span>1μA<span class="_ _6"> </span>(Maxi<span class="_ _7"></span>mum)</div><div class="t m0 xa h9 y17 ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">High<span class="_ _4"> </span>Reliability</span></div><div class="t m0 xd h5 y18 ff4 fs2 fc0 sc0 ls0 ws0">-<span class="_ _8"> </span><span class="ff1">Endurance:<span class="_ _4"> </span>2,000,000<span class="_ _6"> </span>Write<span class="_ _4"> </span>Cycles</span></div><div class="t m0 xd h5 y19 ff4 fs2 fc0 sc0 ls0 ws0">-<span class="_ _8"> </span><span class="ff1">Data<span class="_ _4"> </span>Retention:<span class="_ _4"> </span>100<span class="_ _a"> </span>Y<span class="_ _5"></span>e<span class="_ _5"></span>ars</span></div><div class="t m0 xa h9 y1a ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">Operating<span class="_ _a"> </span>T<span class="_ _c"></span>emperature<span class="_ _4"> </span>Range:<span class="_ _4"> </span>-40°C<span class="_ _4"> </span>to<span class="_ _4"> </span>+105°C</span></div><div class="t m0 xa h9 y1b ff3 fs1 fc0 sc0 ls0 ws0"><span class="_ _3"> </span><span class="ff1 fs2">Green<span class="_ _4"> </span>Packaging<span class="_ _6"> </span>Options<span class="_ _4"> </span>(Pb/<span class="_ _7"></span>Halide-free/RoHS<span class="_ _4"> </span>Compliant)</span></div><div class="t m0 xd h5 y1c ff4 fs2 fc0 sc0 ls0 ws0">-<span class="_ _8"> </span><span class="ff1">DIP-8,TSSOP-8,<span class="_ _6"> </span>SOP-8,MSOP-8,DFN-8<span class="_ _6"> </span>3*3</span></div><div class="t m0 xa h8 y1d ff2 fs4 fc0 sc0 ls0 ws0">Ordering<span class="_ _b"> </span>Information</div><div class="c xa y1e w3 hc"><div class="t m0 xf h7 y1f ff2 fs2 fc0 sc0 ls0 ws0">DEVICE</div></div><div class="c x10 y1e w4 hc"><div class="t m0 x11 h7 y1f ff2 fs2 fc0 sc0 ls0 ws0">Package<span class="_ _4"> </span>T<span class="_ _c"></span>ype</div></div><div class="c x12 y1e w5 hc"><div class="t m0 x13 h7 y1f ff2 fs2 fc0 sc0 ls0 ws0">MARKING</div></div><div class="c x14 y1e w6 hc"><div class="t m0 x11 h7 y1f ff2 fs2 fc0 sc0 ls0 ws0">Packing</div></div><div class="c x15 y1e w7 hc"><div class="t m0 x11 h7 y1f ff2 fs2 fc0 sc0 ls0 ws0">Packing<span class="_ _6"> </span>Qty</div></div><div class="c xa y20 w3 hd"><div class="t m0 x4 h5 y21 ff1 fs2 fc0 sc0 ls0 ws0">HG24C256CN</div></div><div class="c x10 y20 w4 hd"><div class="t m0 x16 h5 y21 ff1 fs2 fc0 sc0 ls0 ws0">DIP-8</div></div><div class="c x12 y20 w5 hd"><div class="t m0 x13 h5 y21 ff1 fs2 fc0 sc0 ls0 ws0">24C256C</div></div><div class="c x14 y20 w6 hd"><div class="t m0 x17 h5 y21 ff1 fs2 fc0 sc0 ls0 ws0">TUBE</div></div><div class="c x15 y20 w7 hd"><div class="t m0 x18 h5 y21 ff1 fs2 fc0 sc0 ls0 ws0">2000pcs/box</div></div><div class="c xa y22 w3 hd"><div class="t m0 x4 h5 y23 ff1 fs2 fc0 sc0 ls0 ws0">HG24C256CM/TR</div></div><div class="c x10 y22 w4 hd"><div class="t m0 x19 h5 y23 ff1 fs2 fc0 sc0 ls0 ws0">SOP-8</div></div><div class="c x12 y22 w5 hd"><div class="t m0 x13 h5 y23 ff1 fs2 fc0 sc0 ls0 ws0">24C256C</div></div><div class="c x14 y22 w6 hd"><div class="t m0 x17 h5 y24 ff1 fs2 fc0 sc0 ls0 ws0">REEL</div></div><div class="c x15 y22 w7 hd"><div class="t m0 x18 h5 y24 ff1 fs2 fc0 sc0 ls0 ws0">2500pcs/reel</div></div><div class="c xa y25 w3 hd"><div class="t m0 x4 h5 y26 ff1 fs2 fc0 sc0 ls0 ws0">HG24C256CMM/TR</div></div><div class="c x10 y25 w4 hd"><div class="t m0 x1a h5 y26 ff1 fs2 fc0 sc0 ls0 ws0">MSOP-8</div></div><div class="c x12 y25 w5 hd"><div class="t m0 x1b h5 y26 ff1 fs2 fc0 sc0 ls0 ws0">C256C</div></div><div class="c x14 y25 w6 hd"><div class="t m0 x17 h5 y27 ff1 fs2 fc0 sc0 ls0 ws0">REEL</div></div><div class="c x15 y25 w7 hd"><div class="t m0 x11 h5 y27 ff1 fs2 fc0 sc0 ls0 ws0">3000pcs/reel</div></div><div class="c xa y28 w3 hd"><div class="t m0 x4 h5 y29 ff1 fs2 fc0 sc0 ls0 ws0">HG24C256CMT/TR</div></div><div class="c x10 y28 w4 hd"><div class="t m0 x1c h5 y29 ff1 fs2 fc0 sc0 ls0 ws0">TSSOP-8</div></div><div class="c x12 y28 w5 hd"><div class="t m0 x1b h5 y29 ff1 fs2 fc0 sc0 ls0 ws0">C256C</div></div><div class="c x14 y28 w6 hd"><div class="t m0 x17 h5 y29 ff1 fs2 fc0 sc0 ls0 ws0">REEL</div></div><div class="c x15 y28 w7 hd"><div class="t m0 x11 h5 y29 ff1 fs2 fc0 sc0 ls0 ws0">3000pcs/reel</div></div><div class="c xa y2a w3 he"><div class="t m0 x4 h5 y2b ff1 fs2 fc0 sc0 ls0 ws0">HG24C256CDQ/TR</div></div><div class="c x10 y2a w4 he"><div class="t m0 x1d h5 y2b ff1 fs2 fc0 sc0 ls0 ws0">DFN-8<span class="_ _6"> </span>3*3</div></div><div class="c x12 y2a w5 he"><div class="t m0 x1b h5 y2b ff1 fs2 fc0 sc0 ls0 ws0">C256C</div></div><div class="c x14 y2a w6 he"><div class="t m0 x17 h5 y2c ff1 fs2 fc0 sc0 ls0 ws0">REEL</div></div><div class="c x15 y2a w7 he"><div class="t m0 x18 h5 y2c ff1 fs2 fc0 sc0 ls0 ws0">3000pcs/reel</div></div><div class="c x1e y2d w8 hf"><div class="t m0 x1f h3 y2e ff1 fs1 fc0 sc0 ls0 ws0">DIP-8</div><div class="t m0 x1b h3 y2f ff1 fs1 fc0 sc0 ls0 ws0">SOP-8</div><div class="t m0 x20 h3 y30 ff1 fs1 fc0 sc0 ls0 ws0">TSSOP-8</div><div class="t m0 x21 h3 y31 ff1 fs1 fc0 sc0 ls0 ws0">MSOP-8</div><div class="t m0 x22 h3 y32 ff1 fs1 fc0 sc0 ls0 ws0">DFN-8<span class="_ _1"> </span>3*3</div></div><a class="l"><div class="d m2"></div></a></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div><div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89695648/bg2.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">HG24C256C</div><div class="t m0 x2 h3 y2 ff1 fs1 fc0 sc0 ls0 ws0">http://www.hgsemi.com.cn<span class="_ _0"> </span>2016<span class="_ _1"> </span>DEC</div><div class="c x3 y3 w2 h4"><div class="t m0 x4 h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">2</div><div class="t m0 x5 h5 y5 ff1 fs2 fc0 sc0 ls0 ws0">/</div><div class="t m0 x6 h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">26</div></div><div class="t m0 xa h8 y33 ff2 fs4 fc0 sc0 ls0 ws0">Description</div><div class="t m0 xd h5 y34 ff1 fs2 fc0 sc0 ls0 ws0">The<span class="_ _4"> </span>HG24<span class="_ _7"></span>C256C<span class="_ _6"> </span>is<span class="_ _6"> </span>a<span class="_ _6"> </span>256-Kbit<span class="_ _6"> </span>I</div><div class="t m0 x23 ha y35 ff1 fs5 fc0 sc0 ls0 ws0">2</div><div class="t m0 x24 h5 y34 ff1 fs2 fc0 sc0 ls0 ws0">C-compatible<span class="_ _6"> </span>Serial<span class="_ _4"> </span>EEPROM<span class="_ _6"> </span>(El<span class="_ _7"></span>ectrically<span class="_ _6"> </span>Erasable<span class="_ _6"> </span>Programmable<span class="_ _6"> </span>Memory)<span class="_ _6"> </span>device.</div><div class="t m0 xa h5 y36 ff1 fs2 fc0 sc0 ls0 ws0">The<span class="_ _1"> </span>devic<span class="_ _7"></span>e<span class="_ _1"> </span>is<span class="_ _1"> </span>d<span class="_ _7"></span>esigned<span class="_ _1"> </span>to<span class="_ _d"> </span>operate<span class="_ _d"> </span>in<span class="_ _1"> </span>a<span class="_ _1"> </span>s<span class="_ _7"></span>upply<span class="_ _1"> </span>voltage<span class="_ _d"> </span>range<span class="_ _1"> </span>of<span class="_ _d"> </span>1.7V<span class="_ _1"> </span>to<span class="_ _d"> </span>5.5V<span class="_ _c"></span>,<span class="_ _1"> </span>with<span class="_ _1"> </span>a<span class="_ _d"> </span>maximum<span class="_ _d"> </span>of<span class="_ _1"> </span>1MHz<span class="_ _1"> </span>tra<span class="_ _7"></span>nsfer<span class="_ _1"> </span>ra<span class="_ _7"></span>te.<span class="_ _1"> </span>The</div><div class="t m0 xa h5 y37 ff1 fs2 fc0 sc0 ls0 ws0">operating<span class="_ _d"> </span>temperature<span class="_ _d"> </span>range<span class="_ _1"> </span>i<span class="_ _7"></span>s<span class="_ _1"> </span>f<span class="_ _7"></span>rom<span class="_ _d"> </span>-40&#176;C<span class="_ _d"> </span>to<span class="_ _d"> </span>+105&#176;C.<span class="_ _1"> </span>The<span class="_ _d"> </span>device<span class="_ _d"> </span>incorp<span class="_ _7"></span>orates<span class="_ _1"> </span>a<span class="_ _d"> </span>Write<span class="_ _d"> </span>Protection<span class="_ _d"> </span>pin<span class="_ _1"> </span>u<span class="_ _7"></span>sed<span class="_ _d"> </span>for<span class="_ _d"> </span>hardware</div><div class="t m0 xa h5 y38 ff1 fs2 fc0 sc0 ls0 ws0">Write<span class="_ _4"> </span>Prote<span class="_ _7"></span>ction<span class="_ _6"> </span>on<span class="_ _6"> </span>the<span class="_ _6"> </span>wh<span class="_ _7"></span>ole<span class="_ _4"> </span>memory<span class="_ _6"> </span>array<span class="_ _5"></span>.</div><div class="t m0 xd h5 y39 ff1 fs2 fc0 sc0 ls0 ws0">The<span class="_ _6"> </span>Serial<span class="_ _6"> </span>EEPROM<span class="_ _1"> </span>memory<span class="_ _4"> </span>i<span class="_ _7"></span>s<span class="_ _6"> </span>organized<span class="_ _6"> </span>as<span class="_ _6"> </span>5<span class="_ _7"></span>12<span class="_ _6"> </span>pages<span class="_ _6"> </span>of<span class="_ _6"> </span>64<span class="_ _1"> </span>bytes<span class="_ _4"> </span>ea<span class="_ _7"></span>ch,<span class="_ _6"> </span>tota<span class="_ _7"></span>ling<span class="_ _4"> </span>32<span class="_ _7"></span>768*8<span class="_ _6"> </span>bits.<span class="_ _4"> </span>The<span class="_ _1"> </span>device<span class="_ _6"> </span>offers<span class="_ _4"> </span>a<span class="_ _7"></span>n</div><div class="t m0 xa h5 y3a ff1 fs2 fc0 sc0 ls0 ws0">additional<span class="_ _d"> </span>64<span class="_ _7"></span>-byte<span class="_ _d"> </span>Identification<span class="_ _b"> </span>Page<span class="_ _d"> </span>for<span class="_ _b"> </span>users<span class="_ _d"> </span>to<span class="_ _b"> </span>store<span class="_ _d"> </span>s<span class="_ _7"></span>ensitive<span class="_ _d"> </span>application<span class="_ _b"> </span>parameters.<span class="_ _d"> </span>This<span class="_ _d"> </span>pag<span class="_ _7"></span>e<span class="_ _d"> </span>can<span class="_ _d"> </span>be<span class="_ _b"> </span>permanently</div><div class="t m0 xa h5 y3b ff1 fs2 fc0 sc0 ls0 ws0">locked<span class="_ _1"> </span>in<span class="_ _d"> </span>Read-only<span class="_ _1"> </span>mo<span class="_ _7"></span>de<span class="_ _1"> </span>afte<span class="_ _7"></span>r<span class="_ _1"> </span>the<span class="_ _d"> </span>application<span class="_ _1"> </span>d<span class="_ _7"></span>ata<span class="_ _1"> </span>is<span class="_ _d"> </span>written<span class="_ _1"> </span>int<span class="_ _7"></span>o<span class="_ _e"></span>the<span class="_ _d"> </span>Ide<span class="_ _7"></span>ntification<span class="_ _d"> </span>Pa<span class="_ _7"></span>ge.<span class="_ _d"> </span>The<span class="_ _d"> </span>HG24C2<span class="_ _7"></span>56C<span class="_ _d"> </span>a<span class="_ _7"></span>lso<span class="_ _d"> </span>o<span class="_ _7"></span>ffers<span class="_ _d"> </span>a</div><div class="t m0 xa h5 y3c ff1 fs2 fc0 sc0 ls0 ws0">separate<span class="_ _d"> </span>memory<span class="_ _d"> </span>block<span class="_ _d"> </span>c<span class="_ _7"></span>ontaining<span class="_ _1"> </span>a<span class="_ _1"> </span>f<span class="_ _7"></span>actory<span class="_ _1"> </span>programmed<span class="_ _1"> </span>12<span class="_ _7"></span>8-bit<span class="_ _1"> </span>Unique<span class="_ _1"> </span>ID.<span class="_ _1"> </span>This<span class="_ _d"> </span>block<span class="_ _1"> </span>is<span class="_ _d"> </span>in<span class="_ _1"> </span>Read-only<span class="_ _e"></span>mode<span class="_ _d"> </span>and<span class="_ _d"> </span>can<span class="_ _d"> </span>be</div><div class="t m0 xa h5 y3d ff1 fs2 fc0 sc0 ls0 ws0">accessed<span class="_ _6"> </span>to<span class="_ _6"> </span>by<span class="_ _6"> </span>sending<span class="_ _6"> </span>a<span class="_ _6"> </span>specific<span class="_ _4"> </span>Rea<span class="_ _7"></span>d<span class="_ _4"> </span>c<span class="_ _7"></span>ommand.</div><div class="t m0 xd h5 y3e ff1 fs2 fc0 sc0 ls0 ws0">The<span class="_ _4"> </span>HG<span class="_ _c"></span>24<span class="_ _5"></span>C<span class="_ _c"></span>256C<span class="_ _1"> </span>is<span class="_ _6"> </span>del<span class="_ _7"></span>ivered<span class="_ _4"> </span>i<span class="_ _7"></span>n<span class="_ _4"> </span>Le<span class="_ _7"></span>ad-free<span class="_ _6"> </span>green<span class="_ _6"> </span>packages:<span class="_ _4"> </span>DI<span class="_ _c"></span>P<span class="_ _5"></span>-<span class="_ _5"></span>8<span class="_ _c"></span>,<span class="_ _6"> </span>TSSOP-8,<span class="_ _4"> </span>SOP-8,<span class="_ _6"> </span>MSOP-<span class="_ _5"></span>8<span class="_ _5"></span>,DF<span class="_ _5"></span>N-8<span class="_ _a"> </span>3*3.</div><div class="t m0 xa h8 y3f ff2 fs4 fc0 sc0 ls0 ws0">Pin<span class="_ _d"> </span>Configuration</div><div class="t m0 x25 h5 y40 ff1 fs2 fc0 sc0 ls0 ws0">DIP-8/SOP-8/TSSOP-8/MSOP-8<span class="_ _f"> </span>DFN-8<span class="_ _6"> </span>3*3</div><div class="t m0 xa h8 y41 ff2 fs4 fc0 sc0 ls0 ws0">Pin<span class="_ _d"> </span>Desc<span class="_ _7"></span>riptions</div><div class="c xa y42 w9 h10"><div class="t m0 x26 h7 y29 ff2 fs2 fc0 sc0 ls0 ws0">Symbol</div></div><div class="c x27 y42 wa h10"><div class="t m0 x28 h7 y29 ff2 fs2 fc0 sc0 ls0 ws0">T<span class="_ _5"></span>y<span class="_ _5"></span>pe</div></div><div class="c x29 y42 wb h10"><div class="t m0 x2a h7 y29 ff2 fs2 fc0 sc0 ls0 ws0">Name<span class="_ _4"> </span>a<span class="_ _7"></span>nd<span class="_ _6"> </span>Function</div></div><div class="c xa y43 w9 h11"><div class="t m0 x6 h7 y44 ff2 fs2 fc0 sc0 ls0 ws0">E0</div><div class="t m0 x6 h7 y45 ff2 fs2 fc0 sc0 ls0 ws0">E1</div><div class="t m0 x6 h7 y46 ff2 fs2 fc0 sc0 ls0 ws0">E2</div></div><div class="c x27 y43 wa h11"><div class="t m0 x2b h7 y45 ff2 fs2 fc0 sc0 ls0 ws0">Input</div></div><div class="c x29 y43 wb h11"><div class="t m0 x26 h5 y47 ff2 fs2 fc0 sc0 ls0 ws0">Device<span class="_ _4"> </span>Addres<span class="_ _7"></span>s<span class="_ _1"> </span>Inputs:<span class="_ _6"> </span><span class="ff1">The<span class="_ _1"> </span>E0,<span class="_ _6"> </span>E1<span class="_ _7"></span>,<span class="_ _1"> </span>and<span class="_ _6"> </span>E2<span class="_ _1"> </span>pins<span class="_ _6"> </span>are<span class="_ _1"> </span>used<span class="_ _1"> </span>to<span class="_ _6"> </span>select<span class="_ _1"> </span>the<span class="_ _1"> </span>device<span class="_ _6"> </span>address<span class="_ _1"> </span>and</span></div><div class="t m0 x26 h5 y48 ff1 fs2 fc0 sc0 ls0 ws0">correspond<span class="_ _1"> </span>to<span class="_ _d"> </span>the<span class="_ _d"> </span>three<span class="_ _1"> </span>Least-Significant<span class="_ _d"> </span>Bits<span class="_ _1"> </span>o<span class="_ _7"></span>f<span class="_ _1"> </span>the<span class="_ _d"> </span>l</div><div class="t m0 x2c ha y49 ff1 fs5 fc0 sc0 ls0 ws0">2</div><div class="t m0 x2d h5 y48 ff1 fs2 fc0 sc0 ls0 ws0">C<span class="_ _d"> </span>seven-bit<span class="_ _1"> </span>slave<span class="_ _1"> </span>a<span class="_ _7"></span>ddress.<span class="_ _1"> </span>These<span class="_ _1"> </span>pi<span class="_ _7"></span>ns</div><div class="t m0 x26 h5 y4a ff1 fs2 fc0 sc0 ls0 ws0">can</div><div class="t m0 x17 h5 y4b ff1 fs2 fc0 sc0 ls0 ws0">be<span class="_ _1"> </span>directly<span class="_ _6"> </span>connected<span class="_ _1"> </span>to<span class="_ _6"> </span>V</div><div class="t m0 x2e h5 y4a ff1 fs2 fc0 sc0 ls0 ws0">CC</div><div class="t m0 x2f h5 y4b ff1 fs2 fc0 sc0 ls0 ws0">or<span class="_ _1"> </span>GND<span class="_ _6"> </span>in<span class="_ _1"> </span>any<span class="_ _6"> </span>combination,<span class="_ _1"> </span>allowing<span class="_ _6"> </span>up<span class="_ _1"> </span>to<span class="_ _6"> </span>eight<span class="_ _1"> </span>devices<span class="_ _6"> </span>on</div><div class="t m0 x26 h5 y4c ff1 fs2 fc0 sc0 ls0 ws0">the</div><div class="t m0 x30 h5 y4d ff1 fs2 fc0 sc0 ls0 ws0">same<span class="_ _6"> </span>bus.</div></div><div class="c xa y4e w9 h12"><div class="t m0 x5 h7 y4f ff2 fs2 fc0 sc0 ls0 ws0">SDA</div></div><div class="c x27 y4e wa h12"><div class="t m0 x31 h7 y4f ff2 fs2 fc0 sc0 ls0 ws0">Input/Output</div></div><div class="c x29 y4e wb h12"><div class="t m0 x26 h5 y50 ff2 fs2 fc0 sc0 ls0 ws0">Serial<span class="_ _6"> </span>Data<span class="_ _7"></span>:<span class="_ _6"> </span><span class="ff1">The<span class="_ _6"> </span>SDA<span class="_ _a"> </span>pi<span class="_ _7"></span>n<span class="_ _6"> </span>is<span class="_ _1"> </span>an<span class="_ _1"> </span>open-drain<span class="_ _6"> </span>bidirectional<span class="_ _1"> </span>input/output<span class="_ _6"> </span>pin<span class="_ _1"> </span>used<span class="_ _6"> </span>to<span class="_ _1"> </span>serially</span></div><div class="t m0 x26 h5 y51 ff1 fs2 fc0 sc0 ls0 ws0">transfer<span class="_ _6"> </span>d<span class="_ _7"></span>ata<span class="_ _4"> </span>t<span class="_ _7"></span>o<span class="_ _6"> </span>and<span class="_ _1"> </span>from<span class="_ _6"> </span>the<span class="_ _6"> </span>devic<span class="_ _7"></span>e.</div></div><div class="c xa y52 w9 h11"><div class="t m0 x32 h7 y53 ff2 fs2 fc0 sc0 ls0 ws0">SCL</div></div><div class="c x27 y52 wa h11"><div class="t m0 x2b h7 y53 ff2 fs2 fc0 sc0 ls0 ws0">Input</div></div><div class="c x29 y52 wb h11"><div class="t m0 x26 h5 y54 ff2 fs2 fc0 sc0 ls0 ws0">Serial<span class="_ _1"> </span>Clock:<span class="_ _6"> </span><span class="ff1">The<span class="_ _1"> </span>SCL<span class="_ _4"> </span>pin<span class="_ _1"> </span>is<span class="_ _1"> </span>used<span class="_ _1"> </span>to<span class="_ _1"> </span>provide<span class="_ _1"> </span>a<span class="_ _6"> </span>clock<span class="_ _1"> </span>to<span class="_ _1"> </span>the<span class="_ _1"> </span>device<span class="_ _1"> </span>and<span class="_ _1"> </span>is<span class="_ _1"> </span>used<span class="_ _6"> </span>t<span class="_ _7"></span>o<span class="_ _1"> </span>control<span class="_ _1"> </span>the</span></div><div class="t m0 x26 h5 y55 ff1 fs2 fc0 sc0 ls0 ws0">flow<span class="_ _2"> </span>of<span class="_ _10"> </span>data<span class="_ _2"> </span>to<span class="_ _10"> </span>and<span class="_ _2"> </span>from<span class="_ _10"> </span>the<span class="_ _2"> </span>device.<span class="_ _10"> </span>Command<span class="_ _2"> </span>and<span class="_ _10"> </span>input<span class="_ _2"> </span>data<span class="_ _2"> </span>p<span class="_ _7"></span>resent<span class="_ _2"> </span>on<span class="_ _10"> </span>the<span class="_ _2"> </span>SDA<span class="_ _b"> </span>pin<span class="_ _2"> </span>i<span class="_ _7"></span>s</div><div class="t m0 x26 h5 y56 ff1 fs2 fc0 sc0 ls0 ws0">always<span class="_ _2"> </span>la<span class="_ _7"></span>tched<span class="_ _2"> </span>in<span class="_ _10"> </span>on<span class="_ _2"> </span>the<span class="_ _10"> </span>rising<span class="_ _2"> </span>ed<span class="_ _7"></span>ge<span class="_ _2"> </span>of<span class="_ _10"> </span>SCL,<span class="_ _2"> </span>while<span class="_ _10"> </span>output<span class="_ _2"> </span>da<span class="_ _7"></span>ta<span class="_ _2"> </span>on<span class="_ _10"> </span>the<span class="_ _2"> </span>SDA<span class="_ _b"> </span>pin<span class="_ _10"> </span>is<span class="_ _2"> </span>always</div><div class="t m0 x26 h5 y57 ff1 fs2 fc0 sc0 ls0 ws0">clocked<span class="_ _6"> </span>out<span class="_ _6"> </span>on<span class="_ _1"> </span>the<span class="_ _6"> </span>falling<span class="_ _6"> </span>edg<span class="_ _7"></span>e<span class="_ _4"> </span>of<span class="_ _6"> </span>SCL<span class="_ _7"></span>.</div></div><div class="c xa y58 w9 h13"><div class="t m0 x5 h7 y4b ff2 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m0 x2b h7 y4a ff2 fs2 fc0 sc0 ls0 ws0">CC</div></div><div class="c x27 y58 wa h13"><div class="t m0 x18 h7 y4a ff2 fs2 fc0 sc0 ls0 ws0">Power</div></div><div class="c x29 y58 wb h13"><div class="t m0 x26 h5 y59 ff2 fs2 fc0 sc0 ls0 ws0">Device<span class="_ _6"> </span>Pow<span class="_ _7"></span>er<span class="_ _6"> </span>Supply:<span class="_ _1"> </span><span class="ff1">The<span class="_ _4"> </span>V</span></div><div class="t m0 x33 h5 y48 ff1 fs2 fc0 sc0 ls0 ws0">CC</div><div class="t m0 x34 h5 y59 ff1 fs2 fc0 sc0 ls0 ws0">pin<span class="_ _6"> </span>is<span class="_ _1"> </span>used<span class="_ _4"> </span>to<span class="_ _1"> </span>supply<span class="_ _6"> </span>the<span class="_ _1"> </span>source<span class="_ _6"> </span>voltage<span class="_ _6"> </span>to<span class="_ _1"> </span>the<span class="_ _6"> </span>device.</div><div class="t m0 x26 h5 y4b ff1 fs2 fc0 sc0 ls0 ws0">Operations<span class="_ _4"> </span>at<span class="_ _6"> </span>i<span class="_ _7"></span>nvalid<span class="_ _6"> </span>V</div><div class="t m0 x35 h5 y4a ff1 fs2 fc0 sc0 ls0 ws0">CC</div><div class="t m0 x36 h5 y4b ff1 fs2 fc0 sc0 ls0 ws0">voltages<span class="_ _4"> </span>m<span class="_ _7"></span>ay<span class="_ _6"> </span>produce<span class="_ _6"> </span>spurious<span class="_ _6"> </span>results<span class="_ _6"> </span>and<span class="_ _4"> </span>s<span class="_ _7"></span>hould<span class="_ _4"> </span>n<span class="_ _7"></span>ot<span class="_ _4"> </span>be</div><div class="t m0 x26 h5 y4c ff1 fs2 fc0 sc0 ls0 ws0">attempted.</div></div><div class="c xa y5a w9 h14"><div class="t m0 x5 h7 y5b ff2 fs2 fc0 sc0 ls0 ws0">GND</div></div><div class="c x27 y5a wa h14"><div class="t m0 x18 h7 y5b ff2 fs2 fc0 sc0 ls0 ws0">Power</div></div><div class="c x29 y5a wb h14"><div class="t m0 x26 h5 y5c ff2 fs2 fc0 sc0 ls0 ws0">Ground:<span class="_ _1"> </span><span class="ff1">The<span class="_ _d"> </span>ground<span class="_ _1"> </span>refe<span class="_ _7"></span>rence<span class="_ _1"> </span>for<span class="_ _1"> </span>th<span class="_ _7"></span>e<span class="_ _1"> </span>p<span class="_ _7"></span>ower<span class="_ _1"> </span>supply<span class="_ _5"></span>.<span class="_ _1"> </span>GND<span class="_ _1"> </span>sh<span class="_ _7"></span>ould<span class="_ _1"> </span>be<span class="_ _d"> </span>connected<span class="_ _1"> </span>to<span class="_ _d"> </span>the</span></div><div class="t m0 x26 h5 y5d ff1 fs2 fc0 sc0 ls0 ws0">systemgro<span class="_ _7"></span>und.</div></div><div class="c xa y5e w9 h15"><div class="t m0 x11 h7 y5f ff2 fs2 fc0 sc0 ls0 ws0">WP</div></div><div class="c x27 y5e wa h15"><div class="t m0 x2b h7 y5f ff2 fs2 fc0 sc0 ls0 ws0">Input</div></div><div class="c x29 y5e wb h15"><div class="t m0 x26 h5 y60 ff2 fs2 fc0 sc0 ls0 ws0">Write<span class="_ _b"> </span>Protection:<span class="_ _2"> </span><span class="ff1">The<span class="_ _2"> </span>W<span class="_ _7"></span>P<span class="_ _b"> </span>pin<span class="_ _b"> </span>i<span class="_ _7"></span>s<span class="_ _2"> </span>used<span class="_ _2"> </span>to<span class="_ _2"> </span>write<span class="_ _b"> </span>p<span class="_ _7"></span>rotect<span class="_ _2"> </span>the<span class="_ _b"> </span>e<span class="_ _7"></span>ntire<span class="_ _2"> </span>contents<span class="_ _2"> </span>of<span class="_ _2"> </span>the<span class="_ _2"> </span>memory<span class="_ _5"></span>.</span></div><div class="t m0 x26 h5 y61 ff1 fs2 fc0 sc0 ls0 ws0">When<span class="_ _11"> </span>the<span class="_ _11"> </span>WP<span class="_ _12"> </span>pin<span class="_ _12"> </span>is<span class="_ _11"> </span>connected<span class="_ _11"> </span>to<span class="_ _12"> </span>P<span class="_ _7"></span>ower<span class="_ _12"> </span>Sup<span class="_ _7"></span>ply<span class="_ _c"></span>,<span class="_ _12"> </span>the<span class="_ _11"> </span>entire<span class="_ _11"> </span>memory<span class="_ _12"> </span>arra<span class="_ _7"></span>y<span class="_ _12"> </span>be<span class="_ _7"></span>comes</div><div class="t m0 x26 h5 y62 ff1 fs2 fc0 sc0 ls0 ws0">Write-protected,<span class="_ _b"> </span>that<span class="_ _2"> </span>is,<span class="_ _b"> </span>the<span class="_ _2"> </span>device<span class="_ _2"> </span>becomes<span class="_ _b"> </span>Re<span class="_ _7"></span>ad-only<span class="_ _5"></span>.<span class="_ _d"> </span>W<span class="_ _7"></span>hen<span class="_ _b"> </span>the<span class="_ _2"> </span>WP<span class="_ _b"> </span>pin<span class="_ _b"> </span>is<span class="_ _2"> </span>connected<span class="_ _2"> </span>to</div><div class="t m0 x26 h5 y63 ff1 fs2 fc0 sc0 ls0 ws0">Ground<span class="_ _6"> </span>or<span class="_ _1"> </span>left<span class="_ _4"> </span>floating,<span class="_ _7"></span>Write<span class="_ _4"> </span>operations<span class="_ _6"> </span>are<span class="_ _1"> </span>enabled.</div><div class="t m0 x26 h5 y64 ff1 fs2 fc0 sc0 ls0 ws0">When<span class="_ _b"> </span>the<span class="_ _b"> </span>W<span class="_ _7"></span>P<span class="_ _d"> </span>pin<span class="_ _b"> </span>i<span class="_ _7"></span>s<span class="_ _b"> </span>driven<span class="_ _b"> </span>h<span class="_ _7"></span>igh,<span class="_ _b"> </span>the<span class="_ _b"> </span>device<span class="_ _b"> </span>ad<span class="_ _7"></span>dress<span class="_ _b"> </span>byte<span class="_ _b"> </span>an<span class="_ _7"></span>d<span class="_ _b"> </span>the<span class="_ _b"> </span>word<span class="_ _b"> </span>addr<span class="_ _7"></span>ess<span class="_ _b"> </span>bytes<span class="_ _b"> </span>are</div><div class="t m0 x26 h5 y65 ff1 fs2 fc0 sc0 ls0 ws0">acknowledged,<span class="_ _6"> </span>data<span class="_ _6"> </span>bytes<span class="_ _1"> </span>are<span class="_ _4"> </span>not<span class="_ _6"> </span>ackn<span class="_ _7"></span>owledged.</div></div><div class="c x37 y66 wc h16"><div class="t m0 x38 h3 y67 ff1 fs1 fc0 sc0 ls0 ws0">(T<span class="_ _c"></span>o<span class="_ _5"></span>p<span class="_ _1"> </span>View)</div></div><a class="l"><div class="d m2"></div></a></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div><div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89695648/bg3.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">HG24C256C</div><div class="t m0 x2 h3 y2 ff1 fs1 fc0 sc0 ls0 ws0">http://www.hgsemi.com.cn<span class="_ _0"> </span>2016<span class="_ _1"> </span>DEC</div><div class="c x3 y3 w2 h4"><div class="t m0 x4 h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">3</div><div class="t m0 x5 h5 y5 ff1 fs2 fc0 sc0 ls0 ws0">/</div><div class="t m0 x6 h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">26</div></div><div class="t m0 xa h8 y33 ff2 fs4 fc0 sc0 ls0 ws0">Functional<span class="_ _d"> </span>Block<span class="_ _b"> </span>Diagram</div><div class="c x39 y68 wd h17"><div class="t m0 x0 h18 y69 ff5 fs6 fc0 sc0 ls0 ws0">E0</div></div><div class="c x3a y6a we h19"><div class="t m0 x3b h1a y6b ff6 fs7 fc0 sc0 ls0 ws0">Hardwar<span class="_ _5"></span>e</div><div class="t m0 x3c h1a y6c ff6 fs7 fc0 sc0 ls0 ws0">Address</div><div class="t m0 x0 h1a y6d ff6 fs7 fc0 sc0 ls0 ws0">Comparat<span class="_ _5"></span>or</div></div><div class="c x3d y6e w6 h1b"><div class="t m0 x0 h1a y6f ff6 fs7 fc0 sc0 ls0 ws0">Memory<span class="_ _6"> </span>System</div><div class="t m0 x3e h1a y70 ff6 fs7 fc0 sc0 ls0 ws0">Control<span class="_ _4"> </span>Module</div></div><div class="c x3f y71 wf h19"><div class="t m0 x3e h1a y72 ff6 fs7 fc0 sc0 ls0 ws0">Pow<span class="_ _5"></span>er<span class="_ _6"> </span>On</div><div class="t m0 x40 h1a y73 ff6 fs7 fc0 sc0 ls0 ws0">Reset</div><div class="t m0 x0 h1a y74 ff6 fs7 fc0 sc0 ls0 ws0">Generato<span class="_ _5"></span>r</div></div><div class="c x41 y75 w10 h1c"><div class="t m0 x0 h18 y76 ff5 fs6 fc0 sc0 ls0 ws0">V</div><div class="t m0 x3c h1d y77 ff5 fs8 fc0 sc0 ls0 ws0">CC</div></div><div class="c x42 y78 w11 h1e"><div class="t m0 x0 h1a y79 ff6 fs7 fc0 sc0 ls0 ws0">High<span class="_ _4"> </span>Vo<span class="_ _5"></span>ltage<span class="_ _4"> </span>Gener<span class="_ _5"></span>ation<span class="_ _4"> </span>Circuit</div></div><div class="c x39 y7a wd h17"><div class="t m0 x0 h18 y7b ff5 fs6 fc0 sc0 ls0 ws0">E1</div></div><div class="c x43 y7a w12 h17"><div class="t m0 x0 h18 y7b ff5 fs6 fc0 sc0 ls0 ws0">WP</div></div><div class="c x2a y7c w13 h1f"><div class="t m0 x0 h20 y7d ff6 fs9 fc0 sc0 ls0 ws0">256-Kbit<span class="_ _13"> </span>EEPROM<span class="_ _13"> </span>Arra<span class="_ _5"></span>y</div></div><div class="c x44 y7e w14 h1b"><div class="t m0 x3e h1a y7f ff6 fs7 fc0 sc0 ls0 ws0">Address<span class="_ _4"> </span>R<span class="_ _5"></span>egister</div><div class="t m0 x40 h1a y80 ff6 fs7 fc0 sc0 ls0 ws0">and<span class="_ _4"> </span>Counter</div></div><div class="c x39 y81 wd h17"><div class="t m0 x0 h18 y82 ff5 fs6 fc0 sc0 ls0 ws0">E2</div></div><div class="c x45 y83 w15 h1e"><div class="t m0 x0 h1a y84 ff6 fs7 fc0 sc0 ls0 ws0">Column<span class="_ _4"> </span>D<span class="_ _7"></span>ecoder</div></div><div class="c x43 y81 w16 h17"><div class="t m0 x0 h18 y82 ff5 fs6 fc0 sc0 ls0 ws0">SCL</div></div><div class="c x46 y85 w17 h1e"><div class="t m0 x0 h1a y86 ff6 fs7 fc0 sc0 ls0 ws0">Data<span class="_ _4"> </span>Regist<span class="_ _5"></span>er</div></div><div class="c x8 y87 w18 h21"><div class="t m0 x0 h22 y77 ff6 fs8 fc0 sc0 ls0 ws0">D</div><div class="t m0 x4 h23 y88 ff6 fsa fc0 sc0 ls0 ws0">OUT</div></div><div class="c x47 y89 w19 h1b"><div class="t m0 x0 h1a y8a ff6 fs7 fc0 sc0 ls0 ws0">Data<span class="_ _4"> </span>&amp;<span class="_ _4"> </span>ACK</div><div class="t m0 x0 h1a y8b ff6 fs7 fc0 sc0 ls0 ws0">I/O<span class="_ _4"> </span>Control</div></div><div class="c x3f y8c w1a h19"><div class="t m0 x38 h1a y8d ff6 fs7 fc0 sc0 ls0 ws0">Start</div><div class="t m0 x3c h1a y8e ff6 fs7 fc0 sc0 ls0 ws0">Stop</div><div class="t m0 x0 h1a y8f ff6 fs7 fc0 sc0 ls0 ws0">Detector</div></div><div class="c x48 y90 w1b h24"><div class="t m0 x0 h22 y91 ff6 fs8 fc0 sc0 ls0 ws0">NMOS</div></div><div class="c x49 y92 w1c h17"><div class="t m0 x0 h18 y93 ff5 fs6 fc0 sc0 ls0 ws0">GND</div></div><div class="c x4a y94 w1d h21"><div class="t m0 x0 h22 y95 ff6 fs8 fc0 sc0 ls0 ws0">D</div><div class="t m0 x4 h23 y96 ff6 fsa fc0 sc0 ls0 ws0">IN</div></div><div class="c x43 y92 w1e h17"><div class="t m0 x0 h18 y93 ff5 fs6 fc0 sc0 ls0 ws0">SDA</div></div><div class="c x4b y97 w1f h25"><div class="t m3 x4c h1a y98 ff6 fs7 fc0 sc0 ls0 ws0">Row<span class="_ _4"> </span>Decoder</div></div><a class="l"><div class="d m2"></div></a></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div><div id="pf4" class="pf w20 h26" data-page-no="4"><div class="pc pc4 w20 h26"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89695648/bg4.jpg"><div class="t m0 x4d h2 y99 ff1 fs0 fc0 sc0 ls0 ws0">HG24C256C</div><div class="t m0 x4e h3 y9a ff1 fs1 fc0 sc0 ls0 ws0">http://www.hgsemi.com.cn<span class="_ _0"> </span>2016<span class="_ _1"> </span>DEC</div><div class="c x4f y9b w2 h4"><div class="t m0 x3b h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">4</div><div class="t m0 x5 h5 y5 ff1 fs2 fc0 sc0 ls0 ws0">/</div><div class="t m0 x6 h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">26</div></div><div class="t m0 x1f h8 y9c ff2 fs4 fc0 sc0 ls0 ws0">Device<span class="_ _d"> </span>Communica<span class="_ _7"></span>tion</div><div class="t m0 x50 h5 y9d ff1 fs2 fc0 sc0 ls0 ws0">The<span class="_ _6"> </span>HG24C2<span class="_ _7"></span>56C<span class="_ _6"> </span>operates<span class="_ _6"> </span>as<span class="_ _1"> </span>a<span class="_ _6"> </span>slave<span class="_ _6"> </span>de<span class="_ _7"></span>vice<span class="_ _6"> </span>and<span class="_ _1"> </span>utilizes<span class="_ _6"> </span>a<span class="_ _6"> </span>2-wire<span class="_ _1"> </span>serial<span class="_ _6"> </span>interface<span class="_ _6"> </span>to<span class="_ _1"> </span>communicate<span class="_ _6"> </span>with<span class="_ _1"> </span>the<span class="_ _6"> </span>Master.<span class="_ _4"> </span>T<span class="_ _5"></span>he<span class="_ _1"> </span>Master</div><div class="t m0 x50 h5 y9e ff1 fs2 fc0 sc0 ls0 ws0">initiates<span class="_ _1"> </span>and<span class="_ _d"> </span>controls<span class="_ _1"> </span>al<span class="_ _7"></span>l<span class="_ _1"> </span>Read<span class="_ _d"> </span>and<span class="_ _1"> </span>Write<span class="_ _1"> </span>operatio<span class="_ _7"></span>ns<span class="_ _1"> </span>to<span class="_ _d"> </span>the<span class="_ _1"> </span>slave<span class="_ _1"> </span>d<span class="_ _7"></span>evices<span class="_ _1"> </span>o<span class="_ _7"></span>n<span class="_ _1"> </span>the<span class="_ _1"> </span>s<span class="_ _7"></span>erial<span class="_ _14"></span>bus,<span class="_ _1"> </span>and<span class="_ _1"> </span>b<span class="_ _7"></span>oth<span class="_ _1"> </span>the<span class="_ _1"> </span>Mast<span class="_ _7"></span>er<span class="_ _1"> </span>and<span class="_ _1"> </span>the<span class="_ _1"> </span>sl<span class="_ _7"></span>ave</div><div class="t m0 x50 h5 y9f ff1 fs2 fc0 sc0 ls0 ws0">devices<span class="_ _6"> </span>can<span class="_ _4"> </span>t<span class="_ _7"></span>ransmit<span class="_ _6"> </span>and<span class="_ _6"> </span>receive<span class="_ _6"> </span>data<span class="_ _6"> </span>on<span class="_ _6"> </span>the<span class="_ _6"> </span>bus.</div><div class="t m0 x50 h5 ya0 ff1 fs2 fc0 sc0 ls0 ws0">The<span class="_ _b"> </span>serial<span class="_ _b"> </span>interface<span class="_ _b"> </span>is<span class="_ _d"> </span>c<span class="_ _7"></span>omprised<span class="_ _b"> </span>of<span class="_ _b"> </span>just<span class="_ _b"> </span>two<span class="_ _b"> </span>signal<span class="_ _d"> </span>l<span class="_ _7"></span>ines:<span class="_ _b"> </span>the<span class="_ _b"> </span>Serial<span class="_ _b"> </span>Clock<span class="_ _b"> </span>(SCL)<span class="_ _b"> </span>and<span class="_ _b"> </span>the<span class="_ _b"> </span>Serial<span class="_ _d"> </span>Data<span class="_ _b"> </span>(SDA).<span class="_ _9"> </span>Da<span class="_ _7"></span>ta<span class="_ _b"> </span>is<span class="_ _2"> </span>a<span class="_ _7"></span>lways</div><div class="t m0 x50 h5 ya1 ff1 fs2 fc0 sc0 ls0 ws0">latched<span class="_ _1"> </span>into<span class="_ _1"> </span>the<span class="_ _1"> </span>HG24C25<span class="_ _7"></span>6C<span class="_ _1"> </span>on<span class="_ _1"> </span>the<span class="_ _1"> </span>rising<span class="_ _1"> </span>edge<span class="_ _1"> </span>of<span class="_ _1"> </span>SCL<span class="_ _6"> </span>an<span class="_ _7"></span>d<span class="_ _1"> </span>is<span class="_ _1"> </span>always<span class="_ _1"> </span>output<span class="_ _1"> </span>from<span class="_ _1"> </span>the<span class="_ _1"> </span>device<span class="_ _14"></span>on<span class="_ _1"> </span>the<span class="_ _1"> </span>falling<span class="_ _1"> </span>edge<span class="_ _1"> </span>of<span class="_ _1"> </span>SCL.<span class="_ _1"> </span>Both</div><div class="t m0 x50 h5 ya2 ff1 fs2 fc0 sc0 ls0 ws0">the<span class="_ _1"> </span>SCL<span class="_ _1"> </span>pin<span class="_ _1"> </span>and<span class="_ _1"> </span>SDA<span class="_ _1"> </span>pin<span class="_ _1"> </span>incorporate<span class="_ _1"> </span>in<span class="_ _7"></span>tegrated<span class="_ _1"> </span>spike<span class="_ _1"> </span>s<span class="_ _7"></span>uppression<span class="_ _1"> </span>filters<span class="_ _14"></span>and<span class="_ _1"> </span>Schmitt<span class="_ _6"> </span>Tr<span class="_ _5"></span>iggers<span class="_ _1"> </span>to<span class="_ _1"> </span>m<span class="_ _7"></span>inimize<span class="_ _1"> </span>the<span class="_ _1"> </span>effects<span class="_ _1"> </span>of<span class="_ _1"> </span>input</div><div class="t m0 x50 h5 ya3 ff1 fs2 fc0 sc0 ls0 ws0">spikes<span class="_ _6"> </span>and<span class="_ _6"> </span>bus<span class="_ _6"> </span>noi<span class="_ _7"></span>se.</div><div class="t m0 x50 h5 ya4 ff1 fs2 fc0 sc0 ls0 ws0">All<span class="_ _1"> </span>command<span class="_ _1"> </span>and<span class="_ _1"> </span>data<span class="_ _1"> </span>informa<span class="_ _7"></span>tion<span class="_ _1"> </span>is<span class="_ _1"> </span>transferred<span class="_ _1"> </span>with<span class="_ _1"> </span>the<span class="_ _1"> </span>Most<span class="_ _1"> </span>Significant<span class="_ _1"> </span>Bit<span class="_ _1"> </span>(MSB)<span class="_ _1"> </span>fi<span class="_ _7"></span>rst.<span class="_ _1"> </span>During<span class="_ _1"> </span>the<span class="_ _1"> </span>bus<span class="_ _1"> </span>communication,<span class="_ _1"> </span>one</div><div class="t m0 x50 h5 ya5 ff1 fs2 fc0 sc0 ls0 ws0">data<span class="_ _1"> </span>bi<span class="_ _7"></span>t<span class="_ _1"> </span>is<span class="_ _1"> </span>t<span class="_ _7"></span>ransmitted<span class="_ _1"> </span>every<span class="_ _d"> </span>clock<span class="_ _1"> </span>cycle,<span class="_ _d"> </span>and<span class="_ _1"> </span>aft<span class="_ _7"></span>er<span class="_ _1"> </span>eight<span class="_ _d"> </span>bits<span class="_ _1"> </span>of<span class="_ _1"> </span>dat<span class="_ _7"></span>a<span class="_ _1"> </span>h<span class="_ _7"></span>as<span class="_ _1"> </span>been<span class="_ _d"> </span>transferred,<span class="_ _1"> </span>the<span class="_ _d"> </span>receiving<span class="_ _1"> </span>device<span class="_ _d"> </span>must<span class="_ _1"> </span>respond</div><div class="t m0 x50 h5 ya6 ff1 fs2 fc0 sc0 ls0 ws0">with<span class="_ _d"> </span>an<span class="_ _d"> </span>acknowledge<span class="_ _d"> </span>or<span class="_ _d"> </span>a<span class="_ _d"> </span>no-acknowledge<span class="_ _d"> </span>response<span class="_ _d"> </span>bit<span class="_ _d"> </span>du<span class="_ _7"></span>ring<span class="_ _d"> </span>a<span class="_ _d"> </span>ninth<span class="_ _d"> </span>clock<span class="_ _d"> </span>cycle<span class="_ _d"> </span>generated<span class="_ _d"> </span>by<span class="_ _d"> </span>the<span class="_ _d"> </span>Master.<span class="_ _6"> </span>There<span class="_ _7"></span>fore,<span class="_ _d"> </span>nine</div><div class="t m0 x50 h5 ya7 ff1 fs2 fc0 sc0 ls0 ws0">clock<span class="_ _b"> </span>c<span class="_ _7"></span>ycles<span class="_ _b"> </span>are<span class="_ _b"> </span>req<span class="_ _7"></span>uired<span class="_ _b"> </span>for<span class="_ _2"> </span>every<span class="_ _2"> </span>one<span class="_ _b"> </span>byte<span class="_ _b"> </span>of<span class="_ _2"> </span>data<span class="_ _b"> </span>tran<span class="_ _7"></span>sferred.<span class="_ _1"> </span>There<span class="_ _b"> </span>is<span class="_ _2"> </span>no<span class="_ _b"> </span>unused<span class="_ _b"> </span>clock<span class="_ _b"> </span>c<span class="_ _7"></span>ycle<span class="_ _d"> </span>du<span class="_ _7"></span>ring<span class="_ _b"> </span>any<span class="_ _d"> </span>Read<span class="_ _b"> </span>o<span class="_ _7"></span>r<span class="_ _d"> </span>Write</div><div class="t m0 x50 h5 ya8 ff1 fs2 fc0 sc0 ls0 ws0">operation,<span class="_ _4"> </span>s<span class="_ _7"></span>o<span class="_ _6"> </span>theremust<span class="_ _6"> </span>not<span class="_ _4"> </span>b<span class="_ _7"></span>e<span class="_ _6"> </span>any<span class="_ _4"> </span>i<span class="_ _7"></span>nterruptions<span class="_ _6"> </span>or<span class="_ _6"> </span>breaks<span class="_ _6"> </span>during<span class="_ _6"> </span>the<span class="_ _6"> </span>dat<span class="_ _7"></span>a<span class="_ _4"> </span>s<span class="_ _7"></span>tream.</div><div class="t m0 x50 h5 ya9 ff1 fs2 fc0 sc0 ls0 ws0">During<span class="_ _1"> </span>data<span class="_ _1"> </span>t<span class="_ _7"></span>ransfers,<span class="_ _1"> </span>data<span class="_ _1"> </span>on<span class="_ _d"> </span>the<span class="_ _1"> </span>SDA<span class="_ _6"> </span>pin<span class="_ _1"> </span>m<span class="_ _7"></span>ust<span class="_ _1"> </span>only<span class="_ _1"> </span>c<span class="_ _7"></span>hange<span class="_ _1"> </span>while<span class="_ _1"> </span>SCL<span class="_ _1"> </span>is<span class="_ _1"> </span>low<span class="_ _5"></span>,<span class="_ _1"> </span>and<span class="_ _1"> </span>th<span class="_ _7"></span>e<span class="_ _1"> </span>data<span class="_ _1"> </span>mu<span class="_ _7"></span>st<span class="_ _1"> </span>remain<span class="_ _7"></span>stable<span class="_ _d"> </span>while<span class="_ _1"> </span>SCL<span class="_ _6"> </span>i<span class="_ _7"></span>s</div><div class="t m0 x50 h5 yaa ff1 fs2 fc0 sc0 ls0 ws0">high.<span class="_ _1"> </span>If<span class="_ _1"> </span>data<span class="_ _1"> </span>on<span class="_ _1"> </span>the<span class="_ _1"> </span>SDA<span class="_ _4"> </span>pi<span class="_ _7"></span>n<span class="_ _1"> </span>changes<span class="_ _1"> </span>while<span class="_ _1"> </span>SCL<span class="_ _6"> </span>is<span class="_ _1"> </span>high,<span class="_ _1"> </span>the<span class="_ _7"></span>n<span class="_ _1"> </span>either<span class="_ _1"> </span>a<span class="_ _1"> </span>Start<span class="_ _1"> </span>or<span class="_ _1"> </span>a<span class="_ _1"> </span>Stop<span class="_ _1"> </span>condition<span class="_ _1"> </span>will<span class="_ _1"> </span>occur<span class="_ _5"></span>.<span class="_ _6"> </span>The<span class="_ _1"> </span>number<span class="_ _1"> </span>of<span class="_ _1"> </span>data</div><div class="t m0 x50 h5 yab ff1 fs2 fc0 sc0 ls0 ws0">bytes<span class="_ _6"> </span>transferred<span class="_ _1"> </span>between<span class="_ _4"> </span>a<span class="_ _1"> </span>Start<span class="_ _6"> </span>and<span class="_ _6"> </span>a<span class="_ _6"> </span>Stop<span class="_ _1"> </span>condition<span class="_ _4"> </span>is<span class="_ _6"> </span>n<span class="_ _7"></span>ot<span class="_ _6"> </span>li<span class="_ _7"></span>mited<span class="_ _6"> </span>and<span class="_ _4"> </span>i<span class="_ _7"></span>s<span class="_ _6"> </span>determined<span class="_ _4"> </span>by<span class="_ _6"> </span>the<span class="_ _6"> </span>Master.</div><div class="t m0 x1f h8 yac ff2 fs4 fc0 sc0 ls0 ws0">Start<span class="_ _d"> </span>Condition</div><div class="t m0 x50 h5 yad ff1 fs2 fc0 sc0 ls0 ws0">A<span class="_ _4"> </span>Start<span class="_ _1"> </span>condition<span class="_ _1"> </span>occurs<span class="_ _6"> </span>when<span class="_ _1"> </span>there<span class="_ _1"> </span>is<span class="_ _6"> </span>a<span class="_ _1"> </span>high-to-low<span class="_ _1"> </span>transition<span class="_ _1"> </span>on<span class="_ _6"> </span>the<span class="_ _1"> </span>SDA<span class="_ _4"> </span>pin<span class="_ _1"> </span>while<span class="_ _1"> </span>the<span class="_ _6"> </span>SCL<span class="_ _6"> </span>pin<span class="_ _1"> </span>is<span class="_ _1"> </span>stable<span class="_ _6"> </span>in<span class="_ _1"> </span>Logic<span class="_ _1"> </span>1<span class="_ _6"> </span>st<span class="_ _7"></span>ate.<span class="_ _6"> </span>The</div><div class="t m0 x50 h5 yae ff1 fs2 fc0 sc0 ls0 ws0">Start<span class="_ _d"> </span>condition<span class="_ _d"> </span>must<span class="_ _d"> </span>precede<span class="_ _d"> </span>any<span class="_ _1"> </span>c<span class="_ _7"></span>ommand<span class="_ _d"> </span>as<span class="_ _d"> </span>the<span class="_ _d"> </span>Master<span class="_ _d"> </span>uses<span class="_ _1"> </span>a<span class="_ _d"> </span>Sta<span class="_ _7"></span>rt<span class="_ _d"> </span>condition<span class="_ _d"> </span>to<span class="_ _d"> </span>initiate<span class="_ _d"> </span>any<span class="_ _1"> </span>d<span class="_ _7"></span>ata<span class="_ _d"> </span>transfer<span class="_ _d"> </span>sequence<span class="_ _d"> </span>(see</div><div class="t m0 x50 h5 yaf ff2 fs2 fc0 sc0 ls0 ws0">Figure<span class="_ _b"> </span>1<span class="_ _7"></span><span class="ff1">).<span class="_ _b"> </span>The<span class="_ _b"> </span>HG24C25<span class="_ _7"></span>6C<span class="_ _b"> </span>will<span class="_ _2"> </span>continuously<span class="_ _2"> </span>monitor<span class="_ _2"> </span>the<span class="_ _b"> </span>SDA<span class="_ _b"> </span>and<span class="_ _b"> </span>SCL<span class="_ _d"> </span>p<span class="_ _7"></span>ins<span class="_ _b"> </span>f<span class="_ _7"></span>or<span class="_ _b"> </span>a<span class="_ _2"> </span>Start<span class="_ _b"> </span>c<span class="_ _7"></span>ondition,<span class="_ _2"> </span>and<span class="_ _b"> </span>the<span class="_ _2"> </span>device<span class="_ _2"> </span>will<span class="_ _2"> </span>not</span></div><div class="t m0 x50 h5 yb0 ff1 fs2 fc0 sc0 ls0 ws0">respond<span class="_ _6"> </span>unless<span class="_ _6"> </span>one<span class="_ _1"> </span>is<span class="_ _6"> </span>given.</div><div class="t m0 x8 h7 yb1 ff2 fs2 fc0 sc0 ls0 ws0">Figure<span class="_ _6"> </span>1<span class="_ _15"> </span>Start,<span class="_ _6"> </span>Stop,<span class="_ _6"> </span>and<span class="_ _a"> </span>ACK</div><div class="t m0 x1f h8 yb2 ff2 fs4 fc0 sc0 ls0 ws0">Stop<span class="_ _d"> </span>Condition</div><div class="t m0 x50 h5 yb3 ff1 fs2 fc0 sc0 ls0 ws0">A<span class="_ _a"> </span>Stop<span class="_ _1"> </span>conditi<span class="_ _5"></span>on<span class="_ _1"> </span>occurs<span class="_ _6"> </span>when<span class="_ _d"> </span>there<span class="_ _1"> </span>is<span class="_ _1"> </span>a<span class="_ _1"> </span>low-to-hig<span class="_ _7"></span>h<span class="_ _1"> </span>transition<span class="_ _1"> </span>on<span class="_ _1"> </span>the<span class="_ _1"> </span>SDA<span class="_ _4"> </span>pin<span class="_ _1"> </span>while<span class="_ _1"> </span>the<span class="_ _1"> </span>SCL<span class="_ _4"> </span>pin<span class="_ _1"> </span>is<span class="_ _1"> </span>s<span class="_ _7"></span>table<span class="_ _1"> </span>in<span class="_ _14"></span>Logic<span class="_ _d"> </span>1<span class="_ _d"> </span>s<span class="_ _7"></span>tate<span class="_ _d"> </span>(see</div><div class="t m0 x50 h5 yb4 ff2 fs2 fc0 sc0 ls0 ws0">Figure<span class="_ _6"> </span>1<span class="ff1">).<span class="_ _4"> </span>A<span class="_ _a"> </span>stop<span class="_ _6"> </span>c<span class="_ _7"></span>ondition<span class="_ _4"> </span>t<span class="_ _7"></span>erminates<span class="_ _4"> </span>c<span class="_ _7"></span>ommunication<span class="_ _6"> </span>between<span class="_ _6"> </span>the<span class="_ _6"> </span>HG24C2<span class="_ _7"></span>56C<span class="_ _4"> </span>an<span class="_ _7"></span>d<span class="_ _6"> </span>the<span class="_ _6"> </span>Master.<span class="_ _a"> </span>A<span class="_ _a"> </span>Stop<span class="_ _6"> </span>condition<span class="_ _6"> </span>at<span class="_ _6"> </span>t<span class="_ _7"></span>he<span class="_ _4"> </span>e<span class="_ _7"></span>nd<span class="_ _6"> </span>of</span></div><div class="t m0 x50 h5 yb5 ff1 fs2 fc0 sc0 ls0 ws0">a<span class="_ _b"> </span>W<span class="_ _7"></span>rite<span class="_ _b"> </span>command<span class="_ _2"> </span>triggers<span class="_ _2"> </span>the<span class="_ _2"> </span>EEPROM<span class="_ _2"> </span>int<span class="_ _7"></span>ernal<span class="_ _b"> </span>write<span class="_ _2"> </span>cycl<span class="_ _7"></span>e.<span class="_ _2"> </span>Otherwise,<span class="_ _b"> </span>t<span class="_ _7"></span>he<span class="_ _d"> </span>HG<span class="_ _5"></span>24C256C<span class="_ _b"> </span>subsequently<span class="_ _b"> </span>ret<span class="_ _7"></span>urns<span class="_ _b"> </span>t<span class="_ _7"></span>o<span class="_ _b"> </span>Stan<span class="_ _7"></span>dby</div><div class="t m0 x50 h5 yb6 ff1 fs2 fc0 sc0 ls0 ws0">mode<span class="_ _6"> </span>after<span class="_ _6"> </span>receiving<span class="_ _6"> </span>a<span class="_ _6"> </span>Stop<span class="_ _1"> </span>condition.</div><div class="t m0 x1f h8 yb7 ff2 fs4 fc0 sc0 ls0 ws0">Acknowledge<span class="_ _d"> </span>(ACK)</div><div class="t m0 x50 h5 yb8 ff1 fs2 fc0 sc0 ls0 ws0">After<span class="_ _2"> </span>each<span class="_ _2"> </span>byte<span class="_ _2"> </span>of<span class="_ _2"> </span>data<span class="_ _2"> </span>is<span class="_ _2"> </span>received,<span class="_ _2"> </span>the<span class="_ _2"> </span>HG24C256C<span class="_ _2"> </span>sh<span class="_ _7"></span>ould<span class="_ _b"> </span>acknowledge<span class="_ _2"> </span>to<span class="_ _10"> </span>the<span class="_ _b"> </span>Master<span class="_ _2"> </span>th<span class="_ _7"></span>at<span class="_ _b"> </span>it<span class="_ _2"> </span>ha<span class="_ _7"></span>s<span class="_ _b"> </span>rec<span class="_ _7"></span>eived<span class="_ _9"> </span>the<span class="_ _2"> </span>data<span class="_ _b"> </span>b<span class="_ _7"></span>yte</div><div class="t m0 x50 h5 yb9 ff1 fs2 fc0 sc0 ls0 ws0">successfully<span class="_ _c"></span>.<span class="_ _6"> </span>This<span class="_ _1"> </span>is<span class="_ _6"> </span>ac<span class="_ _7"></span>complished<span class="_ _6"> </span>b<span class="_ _7"></span>y<span class="_ _6"> </span>the<span class="_ _1"> </span>Master<span class="_ _6"> </span>fi<span class="_ _7"></span>rst<span class="_ _6"> </span>rel<span class="_ _7"></span>easing<span class="_ _1"> </span>the<span class="_ _6"> </span>SDA<span class="_ _4"> </span>line<span class="_ _1"> </span>and<span class="_ _6"> </span>providing<span class="_ _1"> </span>the<span class="_ _4"> </span>ACK/NACK<span class="_ _1"> </span>clock<span class="_ _6"> </span>cycle<span class="_ _1"> </span>(a<span class="_ _6"> </span>ninth</div><div class="t m0 x50 h5 yba ff1 fs2 fc0 sc0 ls0 ws0">clock<span class="_ _6"> </span>cycle<span class="_ _4"> </span>for<span class="_ _6"> </span>every<span class="_ _6"> </span>byte).<span class="_ _6"> </span>During<span class="_ _6"> </span>the<span class="_ _a"> </span>ACK/NACK<span class="_ _6"> </span>clock<span class="_ _6"> </span>cycle,<span class="_ _6"> </span>the<span class="_ _4"> </span>HG24C2<span class="_ _7"></span>56C<span class="_ _6"> </span>must<span class="_ _6"> </span>output<span class="_ _4"> </span>Lo<span class="_ _7"></span>gic<span class="_ _4"> </span>0<span class="_ _6"> </span>as<span class="_ _4"> </span>ACK<span class="_ _4"> </span>for<span class="_ _4"> </span>th<span class="_ _7"></span>e<span class="_ _4"> </span>en<span class="_ _7"></span>tire<span class="_ _4"> </span>clock</div><div class="t m0 x50 h5 ybb ff1 fs2 fc0 sc0 ls0 ws0">cycle<span class="_ _6"> </span>so<span class="_ _6"> </span>th<span class="_ _7"></span>at<span class="_ _6"> </span>the<span class="_ _6"> </span>SDA<span class="_ _4"> </span>line<span class="_ _6"> </span>m<span class="_ _7"></span>ust<span class="_ _6"> </span>be<span class="_ _6"> </span>stable<span class="_ _6"> </span>in<span class="_ _6"> </span>L<span class="_ _7"></span>ogic<span class="_ _6"> </span>0<span class="_ _6"> </span>state<span class="_ _6"> </span>duri<span class="_ _7"></span>ng<span class="_ _4"> </span>t<span class="_ _7"></span>he<span class="_ _6"> </span>entire<span class="_ _6"> </span>high<span class="_ _6"> </span>period<span class="_ _6"> </span>of<span class="_ _6"> </span>t<span class="_ _7"></span>he<span class="_ _4"> </span>c<span class="_ _7"></span>lock<span class="_ _6"> </span>c<span class="_ _7"></span>ycle<span class="_ _6"> </span>(see<span class="_ _4"> </span><span class="ff2">Figure<span class="_ _6"> </span>1</span>).</div><a class="l"><div class="d m2"></div></a></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div><div id="pf5" class="pf w20 h26" data-page-no="5"><div class="pc pc5 w20 h26"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/89695648/bg5.jpg"><div class="t m0 x4d h2 y99 ff1 fs0 fc0 sc0 ls0 ws0">HG24C256C</div><div class="t m0 x4e h3 y9a ff1 fs1 fc0 sc0 ls0 ws0">http://www.hgsemi.com.cn<span class="_ _0"> </span>2016<span class="_ _1"> </span>DEC</div><div class="c x4f y9b w2 h4"><div class="t m0 x3b h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">5</div><div class="t m0 x5 h5 y5 ff1 fs2 fc0 sc0 ls0 ws0">/</div><div class="t m0 x6 h5 y4 ff1 fs2 fc0 sc0 ls0 ws0">26</div></div><div class="t m0 x1f h8 ybc ff2 fs4 fc0 sc0 ls0 ws0">Standby<span class="_ _d"> </span>Mode</div><div class="t m0 x50 h5 ybd ff1 fs2 fc0 sc0 ls0 ws0">The<span class="_ _4"> </span>HG24C256C<span class="_ _d"> </span>features<span class="_ _4"> </span>a<span class="_ _6"> </span>low-power<span class="_ _6"> </span>Standby<span class="_ _6"> </span>mode<span class="_ _6"> </span>which<span class="_ _6"> </span>is<span class="_ _6"> </span>enabled:</div><div class="t m0 x51 h5 ybe ff1 fsb fc0 sc0 ls0 ws0">(1)<span class="_ _6"> </span><span class="fs2">Upon<span class="_ _6"> </span>po<span class="_ _7"></span>wer-up;</span></div><div class="t m0 x51 h27 ybf ff1 fsb fc0 sc0 ls0 ws0">(2)</div><div class="t m0 x52 h5 yc0 ff1 fs2 fc0 sc0 ls0 ws0">After<span class="_ _4"> </span>t<span class="_ _7"></span>he<span class="_ _4"> </span>re<span class="_ _7"></span>ceipt<span class="_ _4"> </span>o<span class="_ _7"></span>f<span class="_ _6"> </span>a<span class="_ _6"> </span>Stop<span class="_ _6"> </span>co<span class="_ _7"></span>ndition<span class="_ _4"> </span>in<span class="_ _6"> </span>Re<span class="_ _7"></span>ad<span class="_ _4"> </span>o<span class="_ _7"></span>peration;</div><div class="t m0 x51 h5 yc1 ff1 fsb fc0 sc0 ls0 ws0">(3)<span class="_ _4"> </span><span class="fs2">The<span class="_ _6"> </span>completion<span class="_ _6"> </span>of<span class="_ _6"> </span>a<span class="_ _7"></span>ny<span class="_ _4"> </span>internal<span class="_ _1"> </span>operations.</span></div><div class="t m0 x1f h8 yc2 ff2 fs4 fc0 sc0 ls0 ws0">Software<span class="_ _d"> </span>Res<span class="_ _7"></span>et</div><div class="t m0 x1f h5 yc3 ff1 fs2 fc0 sc0 ls0 ws0">After<span class="_ _6"> </span>an<span class="_ _1"> </span>interruption<span class="_ _4"> </span>i<span class="_ _7"></span>n<span class="_ _6"> </span>prot<span class="_ _7"></span>ocol,<span class="_ _6"> </span>power<span class="_ _6"> </span>loss,<span class="_ _1"> </span>or<span class="_ _6"> </span>system<span class="_ _6"> </span>reset,<span class="_ _6"> </span>a<span class="_ _7"></span>ny<span class="_ _6"> </span>2-wire<span class="_ _1"> </span>part<span class="_ _4"> </span>c<span class="_ _7"></span>an<span class="_ _6"> </span>be<span class="_ _6"> </span>res<span class="_ _7"></span>et<span class="_ _6"> </span>by<span class="_ _1"> </span>following<span class="_ _6"> </span>these<span class="_ _4"> </span>steps:<span class="_ _4"> </span>(1)<span class="_ _4"> </span>Create<span class="_ _4"> </span>a</div><div class="t m0 x1f h5 yc4 ff1 fs2 fc0 sc0 ls0 ws0">Start<span class="_ _4"> </span>condition;<span class="_ _4"> </span>(2)<span class="_ _4"> </span>Clock<span class="_ _4"> </span>ni<span class="_ _7"></span>ne<span class="_ _4"> </span>cycles;<span class="_ _4"> </span>(3)<span class="_ _4"> </span>Create<span class="_ _4"> </span>another<span class="_ _4"> </span>Start<span class="_ _4"> </span>condition<span class="_ _4"> </span>followedby<span class="_ _4"> </span>a<span class="_ _1"> </span>Stop<span class="_ _4"> </span>c<span class="_ _7"></span>ondition<span class="_ _4"> </span>(s<span class="_ _7"></span>ee<span class="_ _6"> </span><span class="ff2">Figure<span class="_ _6"> </span>2</span>).</div><div class="t m0 x53 h7 yc5 ff2 fs2 fc0 sc0 ls0 ws0">Figure<span class="_ _6"> </span>2<span class="_ _16"> </span>2-wire<span class="_ _6"> </span>Software<span class="_ _4"> </span>Re<span class="_ _7"></span>set</div><div class="t m0 x1f h8 yc6 ff2 fs4 fc0 sc0 ls0 ws0">Device<span class="_ _d"> </span>Rese<span class="_ _7"></span>t<span class="_ _d"> </span>and<span class="_ _b"> </span>Initialization</div><div class="t m0 x50 h5 yc7 ff1 fs2 fc0 sc0 ls0 ws0">The<span class="_ _1"> </span>HG24C256C<span class="_ _1"> </span>incorporates<span class="_ _1"> </span>a<span class="_ _1"> </span>Power-On<span class="_ _1"> </span>Reset<span class="_ _1"> </span>(POR)<span class="_ _6"> </span>c<span class="_ _7"></span>ircuit<span class="_ _1"> </span>to<span class="_ _1"> </span>prevent<span class="_ _1"> </span>inadvertent<span class="_ _1"> </span>operations<span class="_ _1"> </span>during<span class="_ _1"> </span>power-up.<span class="_ _1"> </span>On<span class="_ _1"> </span>a<span class="_ _1"> </span>cold</div><div class="t m0 x50 h5 yc8 ff1 fs2 fc0 sc0 ls0 ws0">power-up,<span class="_ _13"> </span>the<span class="_ _13"> </span>device<span class="_ _10"> </span>do<span class="_ _7"></span>es<span class="_ _13"> </span>not<span class="_ _10"> </span>res<span class="_ _7"></span>pond<span class="_ _13"> </span>to<span class="_ _10"> </span>a<span class="_ _7"></span>ny<span class="_ _13"> </span>instructions<span class="_ _10"> </span>u<span class="_ _7"></span>ntil<span class="_ _13"> </span>the<span class="_ _13"> </span>supply<span class="_ _10"> </span>voltag<span class="_ _7"></span>e<span class="_ _13"> </span>reaches<span class="_ _13"> </span>the<span class="_ _10"> </span>int<span class="_ _7"></span>ernal<span class="_ _13"> </span>pow<span class="_ _5"></span>er-on<span class="_ _13"> </span>reset</div><div class="t m0 x50 h5 yc9 ff1 fs2 fc0 sc0 ls0 ws0">threshold<span class="_ _10"> </span>voltage<span class="_ _2"> </span>(V</div><div class="t m0 x54 ha yca ff1 fs5 fc0 sc0 ls0 ws0">POR</div><div class="t m0 x55 h5 yc9 ff1 fs2 fc0 sc0 ls0 ws0">).<span class="_ _b"> </span>The<span class="_ _10"> </span>supply<span class="_ _10"> </span>voltage<span class="_ _10"> </span>must<span class="_ _2"> </span>ri<span class="_ _7"></span>se<span class="_ _2"> </span>continuously<span class="_ _10"> </span>between<span class="_ _10"> </span>V</div><div class="t m0 x56 ha yca ff1 fs5 fc0 sc0 ls0 ws0">POR</div><div class="t m0 x57 h5 yc9 ff1 fs2 fc0 sc0 ls0 ws0">and<span class="_ _10"> </span>V</div><div class="t m0 x58 ha yca ff1 fs5 fc0 sc0 ls0 ws0">CC</div><div class="t m0 x59 h5 yc9 ff1 fs2 fc0 sc0 ls0 ws0">(Min)<span class="_ _2"> </span>wit<span class="_ _7"></span>hout<span class="_ _2"> </span>a<span class="_ _7"></span>ny<span class="_ _2"> </span>rin<span class="_ _7"></span>g<span class="_ _2"> </span>back<span class="_ _10"> </span>to</div><div class="t m0 x50 h5 ycb ff1 fs2 fc0 sc0 ls0 ws0">ensure<span class="_ _1"> </span>a<span class="_ _1"> </span>proper<span class="_ _1"> </span>power-up.<span class="_ _1"> </span>Once<span class="_ _1"> </span>the<span class="_ _1"> </span>s<span class="_ _7"></span>upply<span class="_ _1"> </span>voltage<span class="_ _1"> </span>passes<span class="_ _1"> </span>V</div><div class="t m0 x5a ha ycc ff1 fs5 fc0 sc0 ls0 ws0">POR</div><div class="t m0 x5b h5 ycb ff1 fs2 fc0 sc0 ls0 ws0">,<span class="_ _1"> </span>the<span class="_ _1"> </span>device<span class="_ _1"> </span>is<span class="_ _1"> </span>reset<span class="_ _1"> </span>an<span class="_ _7"></span>d<span class="_ _1"> </span>enters<span class="_ _1"> </span>Standby<span class="_ _1"> </span>mode.<span class="_ _1"> </span>However<span class="_ _5"></span>,<span class="_ _1"> </span>no</div><div class="t m0 x50 h5 ycd ff1 fs2 fc0 sc0 ls0 ws0">protocol<span class="_ _2"> </span>should<span class="_ _2"> </span>be<span class="_ _2"> </span>issued<span class="_ _2"> </span>to<span class="_ _2"> </span>t<span class="_ _7"></span>he<span class="_ _9"> </span>device<span class="_ _2"> </span>until<span class="_ _2"> </span>a<span class="_ _2"> </span>valid<span class="_ _2"> </span>and<span class="_ _2"> </span>st<span class="_ _7"></span>able<span class="_ _b"> </span>s<span class="_ _7"></span>upply<span class="_ _b"> </span>vol<span class="_ _7"></span>tage<span class="_ _b"> </span>i<span class="_ _7"></span>s<span class="_ _2"> </span>applied<span class="_ _2"> </span>for<span class="_ _2"> </span>the<span class="_ _2"> </span>time<span class="_ _2"> </span>s<span class="_ _7"></span>pecified<span class="_ _b"> </span>by<span class="_ _10"> </span>the<span class="_ _2"> </span>t</div><div class="t m0 x5c ha yce ff1 fs5 fc0 sc0 ls0 ws0">INIT</div><div class="t m0 x50 h5 ycf ff1 fs2 fc0 sc0 ls0 ws0">parameter<span class="_ _5"></span>.<span class="_ _10"> </span>The<span class="_ _13"> </span>supply<span class="_ _13"> </span>voltage<span class="_ _10"> </span>must<span class="_ _13"> </span>remain<span class="_ _17"> </span>stable<span class="_ _17"> </span>and<span class="_ _17"> </span>vali<span class="_ _7"></span>d<span class="_ _17"> </span>until<span class="_ _17"> </span>t<span class="_ _7"></span>he<span class="_ _10"> </span>en<span class="_ _7"></span>d<span class="_ _17"> </span>of<span class="_ _17"> </span>the<span class="_ _17"> </span>p<span class="_ _7"></span>rotocol<span class="_ _17"> </span>transmission,<span class="_ _17"> </span>and<span class="_ _13"> </span>for<span class="_ _17"> </span>a<span class="_ _17"> </span>W<span class="_ _7"></span>rite</div><div class="t m0 x50 h5 yd0 ff1 fs2 fc0 sc0 ls0 ws0">instruction,<span class="_ _4"> </span>u<span class="_ _7"></span>ntil<span class="_ _6"> </span>the<span class="_ _6"> </span>end<span class="_ _6"> </span>of<span class="_ _1"> </span>the<span class="_ _4"> </span>internal<span class="_ _6"> </span>writ<span class="_ _7"></span>e<span class="_ _6"> </span>cycle<span class="_ _4"> </span>(s<span class="_ _7"></span>ee<span class="_ _6"> </span><span class="ff2">Figure<span class="_ _6"> </span>3</span>).</div><div class="t m0 x50 h5 yd1 ff1 fs2 fc0 sc0 ls0 ws0">This<span class="_ _6"> </span>POR<span class="_ _6"> </span>behavior<span class="_ _4"> </span>is<span class="_ _6"> </span>bi-directional.<span class="_ _6"> </span>It<span class="_ _6"> </span>protects<span class="_ _6"> </span>the<span class="_ _4"> </span>HG24<span class="_ _7"></span>C256C<span class="_ _4"> </span>a<span class="_ _7"></span>gainst<span class="_ _4"> </span>brown-out<span class="_ _6"> </span>failure<span class="_ _6"> </span>caused<span class="_ _6"> </span>by<span class="_ _4"> </span>a<span class="_ _6"> </span>te<span class="_ _7"></span>mporary<span class="_ _4"> </span>loss<span class="_ _6"> </span>of<span class="_ _6"> </span>power.</div><div class="t m0 x50 h5 yd2 ff1 fs2 fc0 sc0 ls0 ws0">In<span class="_ _6"> </span>a<span class="_ _1"> </span>similar<span class="_ _4"> </span>way<span class="_ _5"></span>,<span class="_ _6"> </span>as<span class="_ _1"> </span>soon<span class="_ _6"> </span>as<span class="_ _6"> </span>the<span class="_ _6"> </span>su<span class="_ _7"></span>pply<span class="_ _6"> </span>voltage<span class="_ _1"> </span>drops<span class="_ _4"> </span>be<span class="_ _7"></span>low<span class="_ _6"> </span>th<span class="_ _7"></span>e<span class="_ _6"> </span>internal<span class="_ _6"> </span>brown-out<span class="_ _1"> </span>reset<span class="_ _6"> </span>threshold<span class="_ _1"> </span>voltage<span class="_ _6"> </span>(V</div><div class="t m0 x5d ha yd3 ff1 fs5 fc0 sc0 ls0 ws0">BOR</div><div class="t m0 x5e h5 yd2 ff1 fs2 fc0 sc0 ls0 ws0">),<span class="_ _6"> </span>the<span class="_ _6"> </span>d<span class="_ _7"></span>evice<span class="_ _6"> </span>is</div><div class="t m0 x50 h5 yd4 ff1 fs2 fc0 sc0 ls0 ws0">reset<span class="_ _6"> </span>and<span class="_ _6"> </span>s<span class="_ _7"></span>tops<span class="_ _6"> </span>responding<span class="_ _6"> </span>to<span class="_ _6"> </span>a<span class="_ _7"></span>ny<span class="_ _6"> </span>instructions<span class="_ _1"> </span>(see<span class="_ _4"> </span><span class="ff2">Figure<span class="_ _6"> </span>3</span>).<span class="_ _4"> </span>The<span class="_ _6"> </span>V</div><div class="t m0 x5f ha yd5 ff1 fs5 fc0 sc0 ls0 ws0">BOR</div><div class="t m0 x60 h5 yd4 ff1 fs2 fc0 sc0 ls0 ws0">level<span class="_ _6"> </span>is<span class="_ _6"> </span>set<span class="_ _6"> </span>below<span class="_ _6"> </span>the<span class="_ _6"> </span>V</div><div class="t m0 x1 ha yd5 ff1 fs5 fc0 sc0 ls0 ws0">POR</div><div class="t m0 x61 h5 yd4 ff1 fs2 fc0 sc0 ls0 ws0">level.</div><div class="t m0 x50 h5 yd6 ff1 fs2 fc0 sc0 ls0 ws0">Parameters<span class="_ _4"> </span>re<span class="_ _7"></span>lated<span class="_ _4"> </span>to<span class="_ _6"> </span>power-up<span class="_ _6"> </span>and<span class="_ _6"> </span>power-down<span class="_ _6"> </span>conditions<span class="_ _6"> </span>are<span class="_ _4"> </span>l<span class="_ _7"></span>isted<span class="_ _4"> </span>in<span class="_ _4"> </span><span class="ff2">T<span class="_ _5"></span>able<span class="_ _4"> </span>1<span class="ff1">.</span></span></div><div class="t m0 x62 h7 yd7 ff2 fs2 fc0 sc0 ls0 ws0">Figure<span class="_ _6"> </span>3<span class="_ _16"> </span>Power-up<span class="_ _4"> </span>and<span class="_ _6"> </span>Pow<span class="_ _7"></span>er-down<span class="_ _4"> </span>Timing</div><a class="l"><div class="d m2"></div></a></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
100+评论
captcha
    相关资源
    类型标题大小时间
    ZIPnews-dataset15.59MB8月前
    ZIPiotdb-1.3.290.11MB8月前
    ZIPdocker部署snipe-it资产管理系统源码包17.79MB8月前
    ZIP文件搜索工具，文件搜索助手30.95KB8月前
    ZIPadb下载安装及使用adb安装包6.39MB8月前
    ZIP新悦网络（SINREY）Manager音频管理工具3.73MB8月前
    ZIPLinux学习笔记11-按键输入335.93KB8月前
    ZIP图形化编程/Scratch角色素材分享20鬼脸面具合集素材1.11MB8月前