首页下载资源后端Modbus RTU及ASCII主站与从站示例PModbus.zip

ZIPModbus RTU及ASCII主站与从站示例PModbus.zip

foxclever85.54KB需要积分:1

资源文件列表:

PModbus.zip 大约有45个文件
  1. PModbus/EWARM/
  2. PModbus/EWARM/mbplus.ewd 52.43KB
  3. PModbus/EWARM/mbplus.ewp 45.65KB
  4. PModbus/EWARM/mbplus.ewt 177.49KB
  5. PModbus/EWARM/mbplus.eww 160B
  6. PModbus/EWARM/startup_stm32f407xx.s 22.27KB
  7. PModbus/EWARM/stm32f407xx_flash.icf 1.55KB
  8. PModbus/EWARM/stm32f407xx_sram.icf 1.55KB
  9. PModbus/MDKARM/
  10. PModbus/MDKARM/DebugConfig/
  11. PModbus/MDKARM/DebugConfig/mbplus_STM32F407IGTx.dbgconf 2.78KB
  12. PModbus/MDKARM/DebugConfig/Target_1_STM32F407IGTx.dbgconf 2.78KB
  13. PModbus/MDKARM/mbplus.uvguix.yinjj 87.3KB
  14. PModbus/MDKARM/mbplus.uvoptx 51.81KB
  15. PModbus/MDKARM/mbplus.uvprojx 38.61KB
  16. PModbus/MDKARM/RTE/
  17. PModbus/MDKARM/RTE/_mbplus/
  18. PModbus/MDKARM/RTE/_mbplus/RTE_Components.h 344B
  19. PModbus/User/
  20. PModbus/User/Inc/
  21. PModbus/User/Inc/adocprocess.h 1.73KB
  22. PModbus/User/Inc/appconfig.h 13.34KB
  23. PModbus/User/Inc/globalvariable.h 2.42KB
  24. PModbus/User/Inc/gplconfig.h 1.6KB
  25. PModbus/User/Inc/lwipopts.h 4.42KB
  26. PModbus/User/Inc/mbconfig.h 2.58KB
  27. PModbus/User/Inc/mpmain.h 2.16KB
  28. PModbus/User/Inc/mppjprocess.h 1.96KB
  29. PModbus/User/Inc/mpraprocess.h 1.99KB
  30. PModbus/User/Inc/mpudprocess.h 1.65KB
  31. PModbus/User/Inc/stm32f4xx_hal_conf.h 16.94KB
  32. PModbus/User/Inc/stm32f4xx_it.h 3.18KB
  33. PModbus/User/Inc/sysconfig.h 2.84KB
  34. PModbus/User/Inc/sysprocess.h 1.74KB
  35. PModbus/User/Src/
  36. PModbus/User/Src/adocprocess.c 6.08KB
  37. PModbus/User/Src/mpmain.c 2.43KB
  38. PModbus/User/Src/mpmbprocess.c 16.42KB
  39. PModbus/User/Src/mppjprocess.c 13.81KB
  40. PModbus/User/Src/mpraprocess.c 13.85KB
  41. PModbus/User/Src/mpudprocess.c 3.49KB
  42. PModbus/User/Src/stm32f4xx_hal_msp.c 20.8KB
  43. PModbus/User/Src/stm32f4xx_it.c 8.16KB
  44. PModbus/User/Src/sysprocess.c 9.4KB
  45. PModbus/User/Src/system_stm32f4xx.c 27.52KB

资源介绍:

基于我们开源的Modbus协议栈实现的RTU模式和ASCII模式的主站与从站势力。采用IAR和MDK开发。
/** ****************************************************************************** * @file system_stm32f4xx.c * @author MCD Application Team * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. * * This file provides two functions and one global variable to be called from * user application: * - SystemInit(): This function is called at startup just after reset and * before branch to main program. This call is made inside * the "startup_stm32f4xx.s" file. * * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used * by the user application to setup the SysTick * timer or configure other parameters. * * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must * be called whenever the core clock is changed * during program execution. * * ****************************************************************************** * @attention * *

© COPYRIGHT 2017 STMicroelectronics

* * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. Neither the name of STMicroelectronics nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** */ /** @addtogroup CMSIS * @{ */ /** @addtogroup stm32f4xx_system * @{ */ /** @addtogroup STM32F4xx_System_Private_Includes * @{ */ #include "stm32f4xx.h" #if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ #endif /* HSE_VALUE */ #if !defined (HSI_VALUE) #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ #endif /* HSI_VALUE */ /** * @} */ /** @addtogroup STM32F4xx_System_Private_TypesDefinitions * @{ */ /** * @} */ /** @addtogroup STM32F4xx_System_Private_Defines * @{ */ /************************* Miscellaneous Configuration ************************/ /*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */ #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) /* #define DATA_IN_ExtSRAM */ #endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\ STM32F412Zx || STM32F412Vx */ #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) /* #define DATA_IN_ExtSDRAM */ #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\ STM32F479xx */ /*!< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. */ /* #define VECT_TAB_SRAM */ #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. This value must be a multiple of 0x200. */ /******************************************************************************/ /** * @} */ /** @addtogroup STM32F4xx_System_Private_Macros * @{ */ /** * @} */ /** @addtogroup STM32F4xx_System_Private_Variables * @{ */ /* This variable is updated in three ways: 1) by calling CMSIS function SystemCoreClockUpdate() 2) by calling HAL API function HAL_RCC_GetHCLKFreq() 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency Note: If you use this function to configure the system clock; then there is no need to call the 2 first functions listed above, since SystemCoreClock variable is updated automatically. */ uint32_t SystemCoreClock = 16000000; const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; /** * @} */ /** @addtogroup STM32F4xx_System_Private_FunctionPrototypes * @{ */ #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) static void SystemInit_ExtMemCtl(void); #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ /** * @} */ /** @addtogroup STM32F4xx_System_Private_Functions * @{ */ /** * @brief Setup the microcontroller system * Initialize the FPU setting, vector table location and External memory * configuration. * @param None * @retval None */ void SystemInit(void) { /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ #endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Set HSION bit */ RCC->CR |= (uint32_t)0x00000001; /* Reset CFGR register */ RCC->CFGR = 0x00000000; /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= (uint32_t)0xFEF6FFFF; /* Reset PLLCFGR register */ RCC->PLLCFGR = 0x24003010; /* Reset HSEBYP bit */ RCC->CR &= (uint32_t)0xFFFBFFFF; /* Disable all interrupts */ RCC->CIR = 0x00000000; #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) SystemInit_ExtMemCtl(); #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ /* Configure the Vector Table location add offset address ------------------*/ #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ #endif } /** * @brief Update SystemCoreClock variable according to Clock Register Values. * The SystemCoreClock variable contains the core clock (HCLK), it can * be used by the user application to setup the SysTick timer or configure * other parameters. * * @note Each time the core clock (HCLK) changes, this function must be called * to update SystemCoreClock variable value. Otherwise, any configuration *
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