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Computer Architecture
Lecture 10
Copyright ©2022 John T. O'Donnell
Dr José Cano Reyes
School of Computing Science
University of Glasgow
Autumn 2022
Processor Datapath
Outline
Datapath and Control
Processor Datapath
Registers
Internal processor signals
Interface
Operating the datapath
Writing the ir
Fetching an instruction and incrementing pc
Using the register file
2
Where we are going…
We’ll describe a digital circuit (M1) that implements the Sigma16 architecture
It will be specified in full detail (i.e. level of logic gates and flip flops)
No “magic” black boxes
The design contains just logic gates and flip flops
We will have two ways of executing a Sigma16 program
Using the Sigma16 emulator (interprets the machine language, with lots of visual feedback in a
GUI)
Running it on the M1 circuit (reading in the machine code, storing it in memory, and then executing
the program)
3
Plan
The RTM circuit can execute only 1 RRR instruction (add)… now we need to do the rest!
We start with a basic datapath for Sigma16
Just what's required to execute (the core part of) the instruction set
Then we’ll add the rest of a basic system: control and I/O
Then we’ll look at some more sophisticated techniques
Described at higher level, without every detail implemented at circuit level
Examples: Cache, Pipelining, Superscalar
4
Datapath and control
Large circuits are organised into two major subsystems: datapath and control
Example: processor (CPU)
Datapath circuit: contains registers and combinational logic for calculations
Control circuit: generates all the control signals needed by the datapath circuit
Many of the components in the datapath require control inputs
Registers take a load control input
Multiplexers and demultiplexers take conditional inputs (i.e. addresses)
5
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